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CY8C52LP Datasheet(PDF) 60 Page - Cypress Semiconductor |
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CY8C52LP Datasheet(HTML) 60 Page - Cypress Semiconductor |
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60 / 114 page ![]() PSoC® 5LP: CY8C52LP Family Datasheet Document Number: 001-84933 Rev. *L Page 60 of 114 11. Electrical Specifications Specifications are valid for –40 °C TA 85 °C and TJ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V, except where noted. The unique flexibility of the PSoC UDBs and analog blocks enable many functions to be implemented in PSoC Creator components, see the component datasheets for full AC/DC specifications of individual functions. See the “Example Peripherals” section on page 39 for further explanation of PSoC Creator components. 11.1 Absolute Maximum Ratings Table 11-1. Absolute Maximum Ratings DC Specifications[13] Parameter Description Conditions Min Typ Max Units VDDA Analog supply voltage relative to VSSA –0.5 – 6 V VDDD Digital supply voltage relative to VSSD –0.5 – 6 V VDDIO I/O supply voltage relative to VSSD –0.5 – 6 V VCCA Direct analog core voltage input –0.5 – 1.95 V VCCD Direct digital core voltage input –0.5 – 1.95 V VSSA Analog ground voltage VSSD – 0.5 – VSSD + 0.5 V VGPIO[14] DC input voltage on GPIO Includes signals sourced by VDDA and routed internal to the pin. VSSD – 0.5 – VDDIO + 0.5 V VSIO DC input voltage on SIO Output disabled VSSD – 0.5 – 7 V Output enabled VSSD – 0.5 – 6 V VIND Voltage at boost converter input 0.5 – 5.5 V VBAT Boost converter supply VSSD – 0.5 – 5.5 V IVDDIO Current per VDDIO supply pin – – 100 mA IGPIO GPIO current –30 – 41 mA ISIO SIO current –49 – 28 mA IUSBIO USBIO current –56 – 59 mA LU Latch up current[15] –140 – 140 mA ESDHBM Electrostatic discharge voltage Human body model 2000 – – V ESDCDM Electrostatic discharge voltage Charge device model 500 – – V Notes 13. Usage above the absolute maximum conditions listed in Table 11-1 may cause permanent damage to the device. Exposure to Absolute Maximum conditions for extended periods of time may affect device reliability. The Maximum Storage Temperature is 150 °C in compliance with JEDEC Standard JESD22-A103, High Temperature Storage Life. When used below Absolute Maximum conditions but above normal operating conditions, the device may not operate to specification. 14. The VDDIO supply voltage must be greater than the maximum voltage on the associated GPIO pins. Maximum voltage on GPIO pin VDDIO VDDA 15. Meets or exceeds JEDEC Spec EIA/JESD78 IC Latch-up Test. |
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