CY8C52LP datasheet(77/114 Pages) CYPRESS

77 / 114 page

PSoC® 5LP: CY8C52LP Family

Datasheet

Document Number: 001-84933 Rev. *L

Page 77 of 114

Figure 11-27. SAR ADC IDD vs sps, VDDA = 5 V, Continuous

Sample Mode, External Reference Mode

Figure 11-28. SAR ADC Noise Histogram, 100 ksps, Internal

Reference No Bypass

Figure 11-29. SAR ADC Noise Histogram, 1 msps, Internal

Reference Bypassed

Note

42. Based on device characterization (Not production tested).

0.3

0.4

0.5

0.1

0.2

250

500

750

1000

Sample Rate, ksps

Table 11-20. SAR ADC AC Specifications[42]

Parameter

Description

Conditions

Min

Typ

Max

Units

A_SAMP_1

Sample rate with external reference

bypass cap

–

Msps

A_SAMP_2

Sample rate with no bypass cap.

Reference = VDD

–

500

Ksps

A_SAMP_3

Sample rate with no bypass cap.

Internal reference

–

100

Ksps

Startup time

–

µs

SINAD

Signal-to-noise ratio

–

THD

Total harmonic distortion

–

0.02

100

Counts, 12 bit

100

Counts, 12 bit

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