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HC55183ECMZ Datasheet(PDF) 12 Page - Renesas Technology Corp

Part # HC55183ECMZ
Description  Extended Reach Ringing SLIC Family
PDF  19 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HC55183ECMZ Datasheet(HTML) 12 Page - Renesas Technology Corp

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HC55183, HC55184
FN4519 Rev 8.00
Page 12 of 19
August 10, 2010
Since the current relationships are different for constant
current versus constant voltage, the region of device operation
is critical to valid power dissipation calculations.
Reverse Active
Overview
The reverse active mode (RA, 011) provides the same
functionality as the forward active mode. On hook
transmission, DC loop feed and voice transmission are
supported. Loop supervision is provided by either the switch
hook detector (E0 = 1) or the ground key detector (E0 = 0). The
device may be operated from either high or low battery.
During reverse active the Tip and Ring DC voltage
characteristics exchange roles. That is, Ring is typically 4V
below ground and Tip is typically 4V more positive than
battery. Otherwise, all feed and voice transmission
characteristics are identical to forward active.
Silent Polarity Reversal
Changing from forward active to reverse active or vice versa is
referred to as polarity reversal. Many applications require slew
rate control of the polarity reversal event. Requirements range
from minimizing cross talk to protocol signalling.
The device uses an external low voltage capacitor, CPOL, to
set the reversal time. Once programmed, the reversal time will
remain nearly constant over various load conditions. In
addition, the reversal timing capacitor is isolated from the AC
loop, therefore loop stability is not impacted.
The internal circuitry used to set the polarity reversal time is
shown in the following.
During forward active, the current from source I1 charges the
external timing capacitor CPOL and the switch is open. The
internal resistor provides a clamping function for voltages on
the POL node. During reverse active, the switch closes and I2
(roughly twice I1) pulls current from I1 and the timing capacitor.
The current at the POL node provides the drive to a differential
pair which controls the reversal time of the Tip and Ring DC
voltages.
Where
time is the required reversal time. Polarized capacitors
may be used for CPOL. The low voltage at the POL pin and
minimal voltage excursion
0.75V, are well suited to polarized
capacitors.
Power Dissipation
The power dissipation equations for forward active operation
also apply to the reverse active mode.
Ringing
Overview
The ringing mode (RNG, 100) provides linear amplification to
support a variety of ringing waveforms. A programmable ring
trip function provides loop supervision and auto disconnect
upon ring trip. The device is designed to operate from the high
battery during this mode.
Architecture
The device provides linear amplification to the signal applied to
the ringing input, VRS. The differential ringing gain of the
device is 80V/V. The circuit model for the ringing path is shown
in the following figure.
The voltage gain from the VRS input to the Tip output is 40V/V.
The resistor ratio provides a gain of 8 and the current mirror
provides a gain of 5. The voltage gain from the VRS input to
the Ring output is -40V/V. The equations for the Tip and Ring
outputs during ringing are provided below.
When the input signal at VRS is zero, the Tip and Ring
amplifier outputs are centered at half battery. The device
provides auto centering for easy implementation of sinusoidal
ringing waveforms. Both AC and DC control of the Tip and
Ring outputs is available during ringing. This feature allows for
DC offsets as part of the ringing waveform.
Ringing Input
The ringing input, VRS, is a high impedance input. The high
impedance allows the use of low value capacitors for AC
coupling the ring signal. The VRS input is enabled only during
the ringing mode, therefore a free running oscillator may be
connected to VRS at all times.
When operating from a battery of -75V, each amplifier, Tip and
Ring, will swing a maximum of 70VP-P . Hence, the maximum
signal swing at VRS to achieve full scale ringing is
FIGURE 8. REVERSAL TIMING CONTROL
CPOL
POL
I1
75k
I2
CPOL
time
75000
----------------
=
(EQ. 30)
FIGURE 9. LINEAR RINGING MODEL
TIP
RING
VRS
R/8
R
R
+
-
+-
5:1
20
20
+-
+
-
800K
VBH
2
VT
VBH
2
-----------
40 VRS

+
=
(EQ. 31)
VR
VBH
2
-----------
40 VRS

–
=
(EQ. 32)



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