IMX7SCEC datasheet(16/152 Pages) NXP

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i.MX 7Solo Family of Applications Processors Datasheet, Rev. 5, 07/2017

NXP Semiconductors

The package contact assignments can be found in Section 6, “Package information and contact

assignments.” Signal descriptions are provided in the i.MX 7Solo Application Processor Reference

Manual (IMX7SRM).

Table 3. Special signal considerations

Signal Name

Remarks

CCM_CLK1_P/

CCM_CLK1_N

CCM_CLK2

One general purpose differential high speed clock input/output and one single-ended clock input

are provided.

Either or both of them can be used:

• To feed an external reference clock to the PLLs and to the modules inside the SoC, for

example, as an alternate reference clock for Video/Audio interfaces and so forth.

• To output the internal SoC clock to be used outside the SoC as either a reference clock or as

a functional clock for peripherals; for example, it can be used as an output of the PCIe master

clock (root complex use)

See the

i.MX 7Solo Application Processor Reference Manual (IMX7SRM) for details on the

respective clock trees.

The CCM_CLK1_* inputs/outputs are an LVDS differential pair.

Alternatively, a single-ended signal may be used to drive CCM_CLK1_P input. In this case

corresponding CCM_CLK1_N input should be tied to the constant voltage level equal to 1/2 of the

input signal swing.

Termination should be provided in case of high frequency signals.

See the LVDS pad electrical specification for further details. CCM_CLK2 is a single-ended input

referenced to ground.

After initialization:

• The CCM_CLK1_* inputs/outputs can be disabled if not used. Any of the unused CCM_CLK1_*

pins may be left floating.

• The CCM_CLK2 input should be grounded if not used.

RTC_XTALI/RTC_XTALO

If the user wishes to configure RTC_XTALI and RTC_XTALO as an RTC oscillator, a 32.768 kHz

crystal, (100 k ESR, 10 pF load) should be connected between RTC_XTALI and RTC_XTALO. It

is recommended to use the configurable load capacitors provided in the IP instead of adding them

externally. To hit the exact oscillation frequency, the configurable capacitors need to be reduced

to account for board and chip parasitics.

The integrated oscillation amplifier is self biasing, but relatively weak. Care must be taken to limit

parasitic leakage from RTC_XTALI and RTC_XTALO to either power or ground (>100 M). This will

debias the amplifier and cause a reduction of startup margin. Typically RTC_XTALI and

RTC_XTALO should bias to approximately 0.5 V.

If it is desired to feed an external low frequency clock into RTC_XTALI, the RTC_XTALO pin

should be left floating or driven with a complimentary signal. The logic level of this forcing clock

should not exceed VDD_SNVS_CAP level.

In the case when a high-accuracy realtime clock is not required, the system may use internal low

frequency oscillator. It is recommended to connect RTC_XTALI to ground and keep RTC_XTALO

floating. This will however result in increased power consumption, because the internal oscillator

uses higher power than the RTC oscillator. Thus for lowest power configuration it is recommended

to always install a crystal.

XTALI/XTALO

A 24.0 MHz crystal should be connected between XTALI and XTALO.

IMX7SCEC Datasheet(PDF) 16 Page - NXP Semiconductors

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