IMX7SCEC datasheet(57/152 Pages) NXP

57 / 152 page

Electrical characteristics

i.MX 7Solo Family of Applications Processors Datasheet, Rev. 5, 07/2017

NXP Semiconductors

Figure 23. DTACK Mode write access (DAP=0)

Table 39. EIM asynchronous timing parameters table relative chip to select

Ref No.

Parameter

Determination by

Synchronous measured

parameters1

Min

Max

Unit

WE31

EIM_CSx_B valid to Address

Valid

WE4 – WE6 – CSA2

—

3 – CSA

WE32

Address Invalid to EIM_CSx_B

invalid

WE7 – WE5 – CSN3

—3 – CSN

WE32A(m

uxed A/D

EIM_CSx_B valid to Address

Invalid

t4 + WE4 – WE7 + (ADVN5 +

ADVA6 + 1 – CSA)

–3 + (ADVN +

ADVA + 1 – CSA)

—ns

WE33

EIM_CSx_B Valid to

EIM_WE_B Valid

WE8 – WE6 + (WEA – WCSA)

—

3 + (WEA – WCSA)

WE34

EIM_WE_B Invalid to

EIM_CSx_B Invalid

WE7 – WE9 + (WEN – WCSN)

—

3 + (WEN – WCSN)

WE35

EIM_CSx_B Valid to

EIM_OE_B Valid

WE10 – WE6 + (OEA – RCSA)

—

3 + (OEA – RCSA)

WE35A

(muxed

A/D)

EIM_CSx_B Valid to

EIM_OE_B Valid

WE10 – WE6 + (OEA +

RADVN + RADVA + ADH + 1 –

RCSA)

–3 + (OEA +

RADVN+RADVA+

ADH+1–RCSA)

3 + (OEA +

RADVN+RADVA+AD

H+1–RCSA)

WE36

EIM_OE_B Invalid to

EIM_CSx_B Invalid

WE7 – WE11 + (OEN – RCSN)

—

3 – (OEN – RCSN)

WE37

EIM_CSx_B Valid to

EIM_EBx_B Valid (Read

access)

WE12 – WE6 + (RBEA –

RCSA)

—

3 + (RBEA – RCSA)

Last Valid Address

Address V1

D(V1)

EIM_ADDRxx

EIM_DATAxx

EIM_WE_B

EIM_LBA_B

EIM_OE_B

EIM_EBx_B

EIM_CSx_B

Next Address

WE31

WE39

WE33

WE45

WE32

WE40

WE34

WE46

WE42

WE41

EIM_DTACK_B

WE48

WE47

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