DSP56857 datasheet(454/662 Pages) FREESCALE

454 / 662 page

Servicing the Host Interface

5685X Digital Signal Controller User Manual, Rev. 4

16-28

Freescale Semiconductor

Figure 16-15. HI8 Receive Byte Low Register (RXL)

See Programmer’s Sheet on Appendix page B - 145

* Depends on HLEND setting

16.10.4 Transmit Byte Registers (TXH, TXL)

The Transmit Byte Registers are viewed as two 8-bit write-only registers by the Host Processor.

These registers are called Transmit High (TXH) and Transmit Low (TXL). The two registers

transmit data to the High Byte and Low Byte, respectively from the HRX register. They are

selected by three external Host Address (HA2, HA1, and HA0) inputs during a Host Processor

write operation, or by an on-chip address counter in DMA operations. Data can be written into

the Transmit Byte Registers when the Transmit Data Register Empty (TXDE) bit is set. The Host

Processor can program the TREQ bit to assert the external HREQ pin when TXDE is set. This

informs the Host Processor, or Host DMA controller the Transmit Byte Registers are empty.

Writing the data register at Host Address $7 clears the TXDE bit.

•

When the HLEND bit in the ICR is cleared, the TXH register is located at address $6 and

TXL at $7.

•

When the HLEND bit in the ICR is set, the TXH register is located at address $7 and TXL

at $6.

The Transmit Byte Registers are transferred as 16-bit data to the HRX register when both TXDE

and the HRDF bits are cleared. This transfer operation sets the TXDE and HRDF bits.

Figure 16-16. HI8 Transmit Byte High Register (TXH)

See Programmer’s Sheet on Appendix page B - 146

* Depends on HLEND setting

Base + $7/$6*

Read

RXL

Write

Reset

00000000

Base + $6/$7*

Read

Write

TXH

Reset

00000000

DSP56857 Datasheet(PDF) 454 Page - Freescale Semiconductor, Inc