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M29DW128F Datasheet(PDF) 37 Page - STMicroelectronics |
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M29DW128F Datasheet(HTML) 37 Page - STMicroelectronics |
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37 / 93 page ![]() M29DW128F 6 Command Interface 37/93 Table 14. Fast Program Commands, 16-bit Mode 6.3 Block Protection commands Blocks or groups of blocks can be protected against accidental program, erase or read operations. The Protection Groups are shown in Appendix A, Table 34: Block Addresses and Protection Groups. The device block protection scheme is shown in Figure 7: Software Protection Scheme and Figure 6: Block Protection State Diagram. See either Table 15, or Table 16, depending on the configuration that is being used, for a summary of the Block Protection commands. Only the commands related to the Extended Block Protection are available in both 8 bit and 16 bit memory configuration. The other block protection commands are available in 16-bit configuration only. 6.3.1 Enter Extended Block command The M29DW128F has one extra 256-Byte block (Extended Block) that can only be accessed using the Enter Extended Block command. Three Bus Write cycles are required to issue the Extended Block command. Once the command has been issued the device enters the Extended Block mode where all Bus Read or Program operations are conducted on the Extended Block. Once the device is in the Extended Block mode, the Extended Block is addressed by using the addresses occupied by the boot blocks in the other operating modes (see Table 34: Block Addresses and Protection Groups). The device remains in Extended Block mode until the Exit Extended Block command is issued or power is removed from the device. After power-up or a hardware reset, the device reverts to Command Bus Write Operations(1) 1. X Don’t Care, PA Program Address, PD Program Data, BA Any address in the Block, BKA Bank Address, WBL Write Buffer Location. All values in the table are in hexadecimal. 1st 2nd 3rd 4th 5th 6th Add Data Add Data Add Data Add Data Add Data Add Data Write to Buffer and Program N+ 5 555 AA 2AA 55 BA 25 BA N(2) 2. The maximum number of cycles in the command sequence is 37. N+1 is the number of Words to be programmed during the Write to Buffer and Program operation. PA(3) 3. Each buffer has the same A5-A22 addresses. A0-A4 are used to select a Word within the N+1 Word page. PD WBL (4) 4. The 6th cycle has to be issued N time. WBL scans the Word inside the page. PD Write to Buffer and Program Abort and Reset 3 555 AA 2AA 55 555 F0 Write to Buffer and Program Confirm 1 BA(5) 5. BA must be identical to the address loaded during the Write to buffer and Program 3rd and 4th cycles. 29 Double Word Program 3 555 50 PA0 PD0 PA1 PD1 Quadruple Word Program 5 555 56 PA0 PD0 PA1 PD1 PA2 PD2 PA3 PD3 Unlock Bypass 3 555 AA 2AA 55 555 20 Unlock Bypass Program 2 X A0 PA PD Unlock Bypass Reset 2 X 90 X 00 |
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