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H8/3002 Datasheet(PDF) 122 Page - Renesas Technology Corp |
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H8/3002 Datasheet(HTML) 122 Page - Renesas Technology Corp |
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122 / 700 page ![]() 6.2.2 Access State Control Register (ASTCR) ASTCR is an 8-bit readable/writable register that selects whether each area is accessed in two states or three states. ASTCR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in software standby mode. Bits 7 to 0—Area 7 to 0 Access State Control (AST7 to AST0): These bits select whether the corresponding area is accessed in two or three states. Bits 7 to 0 AST7 to AST0 Description 0 Areas 7 to 0 are accessed in two states 1 Areas 7 to 0 are accessed in three states (Initial value) ASTCR specifies the number of states in which external areas are accessed. On-chip memory and registers are accessed in a fixed number of states that does not depend on ASTCR settings. Bit Initial value Read/Write 7 AST7 1 R/W 6 AST6 1 R/W 5 AST5 1 R/W 4 AST4 1 R/W 3 AST3 1 R/W 0 AST0 1 R/W 2 AST2 1 R/W 1 AST1 1 R/W Bits selecting number of states for access to each area 107 |
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