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STM32G47PBY3XXX Datasheet(PDF) 127 Page - STMicroelectronics |
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STM32G47PBY3XXX Datasheet(HTML) 127 Page - STMicroelectronics |
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127 / 229 page ![]() DS12712 Rev 3 127/229 STM32G473xB STM32G473xC STM32G473xE Electrical characteristics 194 Note: For more information about GPIO properties, refer to the application note AN4899 "STM32 GPIO configuration for hardware settings and low-power consumption" available from the ST website www.st.com. All I/Os are CMOS- and TTL-compliant (no software configuration required). Their characteristics cover more than the strict CMOS-technology or TTL parameters. The coverage of these requirements is shown in Figure 25 for standard I/Os, and in Figure 25 for 5 V tolerant I/Os. Figure 25. I/O input characteristics Output driving current The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or source up to ± 20 mA (with a relaxed VOL/VOH). 2. Data based on characterization results, not tested in production 3. Guaranteed by design. 4. This value represents the pad leakage of the I/O itself. The total product pad leakage is provided by this formula: ITotal_Ileak_max = 10 μA + [number of I/Os where VIN is applied on the pad] ₓ Ilkg(Max). 5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This PMOS/NMOS contribution to the series resistance is minimal (~10% order). MSv37613V1 Teste d in production CMOS requirement Vih min = 0 .7xV DDIO x Based on simulati on Vi h min = 0. 61xV DDIOx +0.05 for 1.08<V DDIOx <1.62 or 0.49xV DDIOx +0.2 6 for VDDI Ox>1 .62 Based on simu lation Vil m ax =0.43xV DDIOx -0.1 for 1.08 <VDDIOx <1.62 or 0.39xV DDIOx -0.06 for VDDIO x>1.62 Tested in produ ction CMOS requirement Vil ma x = 0.3xVdd TTL requirement Vih min = 2V TTL requirement Vil max = 0.8V |
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