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AT25FF321A Datasheet(PDF) 76 Page - Dialog Semiconductor

Part # AT25FF321A
Description  32-Mbit, 1.65 V - 3.6 V SPI Serial Flash Memory with Multi-I/O Support
PDF  119 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

AT25FF321A Datasheet(HTML) 76 Page - Dialog Semiconductor

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Datasheet
2021-08-19
DS-AT25FF321A-181
Revision J
76
© 2021 Dialog Semiconductor
AT25FF321A
32-Mbit, 1.65 V - 3.6 V SPI Serial Flash Memory
with Multi-I/O Support
6.18 INDIVIDUAL BLOCK UNLOCK (39H)
The Individual Block Unlock command can be used to unlock individual pages in the memory array to allow them to be pro-
grammed or erased via one of the Program or Erase commands. To enable the individual block unlock function, the WPS bit in
Status Register 3 must be set. If WPS is cleared, write protection is then determined by the combination of the CMP, SEC, TB,
and BP[2:0] bits in Status Register 1. The default value for each individual lock bit is 1 at power-up or reset, so the entire memory
array is being protected.
6.18.1 Command Prerequisites
The Write Enable (06h) command must be executed before the device can accept the Individual Block Unlock command. This is
required to set the WEL bit in Status Register 1.
6.18.2 Transfer Format
The 39h command follows the 1-1-0 transfer format described in Section 4.2, where the command and address are transferred
on the SI pin. The address represents the individual block to be unlocked. Hence no data is transferred for this command. See
Figure 4 for a timing diagram of this transaction.
6.18.3 Transfer Sequence
To perform the individual block unlock operation, the CS pin is asserted and the information transferred as follows:
The 39h command is clocked into the device. Eight clocks are required to transfer the command. The most significant bit of
the command is transferred first.
Three address bytes are clocked in to specify the address location to be unlocked within the memory array. A total of 24
clocks are required to transfer the address. The most significant bit of the address (A[23]) is transferred first.
When the CS pin is deasserted, hardware performs the operation and clears the WEL bit in Status Register 1.
See Table 17 for more information on the transfer sequence for this command.
6.18.4 Programming Restrictions
The Individual Block Unlock command adheres to the following programming restrictions.
The complete command must be clocked into the device before the CS pin is deasserted.
The CS pin must be deasserted on a byte boundary (multiple of eight bits). Otherwise, the device aborts the operation and
no action is taken.



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