MPC8533EVJALGA datasheet(58/112 Pages) NXP

58 / 112 page

MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 8

Freescale Semiconductor

High-Speed Serial Interfaces (HSSI)

Figure 38 shows the PCI input AC timing conditions.

Figure 38. PCI Input AC Timing Measurement Conditions

Figure 39 shows the PCI output AC timing conditions.

Figure 39. PCI Output AC Timing Measurement Condition

16 High-Speed Serial Interfaces (HSSI)

The MPC8533E features two serializer/deserializer (SerDes) interfaces to be used for high-speed serial

interconnect applications.Both SerDes1 and SerDes2 can be used for PCI Express data transfers

application.This section describes the common portion of SerDes DC electrical specifications, which is the

DC requirement for SerDes Reference Clocks. The SerDes data lane’s transmitter and receiver reference

circuits are also shown.

16.1

Signal Terms Definition

The SerDes utilizes differential signaling to transfer data across the serial link. This section defines terms

used in the description and specification of differential signals.

Figure 40 shows how the signals are defined. For illustration purpose, only one SerDes lane is used for

description. The figure shows waveform for either a transmitter output (SDn_TX and SDn_TX) or a

receiver input (SDn_RX and SDn_RX). Each signal swings between A Volts and B Volts where A > B.

tPCIVKH

CLK

Input

tPCIXKH

CLK

Output Delay

tPCKHOV

High-Impedance

tPCKHOZ

Output

MPC8533EVJALGA Datasheet(PDF) 58 Page - NXP Semiconductors