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ST25R3911B Datasheet(PDF) 114 Page - STMicroelectronics |
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ST25R3911B Datasheet(HTML) 114 Page - STMicroelectronics |
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114 / 116 page ![]() Table 53. FIFO status register 1................................................................ 74 Table 54. FIFO status register 2................................................................ 74 Table 55. Collision display register .............................................................. 75 Table 56. Number of transmitted bytes register 1 .................................................... 76 Table 57. Number of transmitted bytes register 2 .................................................... 76 Table 58. NFCIP bit rate detection display register ................................................... 77 Table 59. A/D converter output register ........................................................... 77 Table 60. Antenna calibration control register ...................................................... 78 Table 61. Antenna calibration target register ....................................................... 78 Table 62. Antenna calibration display register ...................................................... 79 Table 63. AM modulation depth control register ..................................................... 79 Table 64. AM modulation depth display register ..................................................... 80 Table 65. RFO AM modulated level definition register ................................................. 81 Table 66. RFO normal level definition register ...................................................... 81 Table 67. External field detector threshold register ................................................... 82 Table 68. Peer detection threshold as seen on RFI1 input .............................................. 82 Table 69. Collision avoidance threshold as seen on RFI1 input .......................................... 83 Table 70. Regulator voltage control register........................................................ 83 Table 71. Regulator and timer display register ...................................................... 84 Table 72. Regulated voltages ................................................................. 84 Table 73. RSSI display register ................................................................ 85 Table 74. RSSI ........................................................................... 85 Table 75. Gain reduction state register ........................................................... 86 Table 76. Capacitive sensor control register ....................................................... 86 Table 77. Capacitive sensor display register ....................................................... 87 Table 78. Auxiliary display register .............................................................. 87 Table 79. Wake-up timer control register .......................................................... 88 Table 80. Typical wake-up time ................................................................ 88 Table 81. Amplitude measurement configuration register............................................... 89 Table 82. Amplitude measurement reference register ................................................. 89 Table 83. Amplitude measurement auto-averaging display register........................................ 90 Table 84. Amplitude measurement display register ................................................... 90 Table 85. Phase measurement configuration register ................................................. 91 Table 86. Phase measurement reference register ................................................... 91 Table 87. Phase measurement auto-averaging display register .......................................... 92 Table 88. Phase measurement display register ..................................................... 92 Table 89. Capacitance measurement configuration register ............................................. 93 Table 90. Capacitance measurement reference register ............................................... 93 Table 91. Capacitance measurement auto-averaging display register ...................................... 94 Table 92. Capacitance measurement display register ................................................. 94 Table 93. IC identity register .................................................................. 95 Table 94. ST25R3911B pin definitions - QFN32 package .............................................. 96 Table 95. Electrical parameters ................................................................ 98 Table 96. Electrostatic discharge ............................................................... 98 Table 97. Temperature ranges and storage conditions ................................................ 98 Table 98. Operating conditions ................................................................ 99 Table 99. CMOS inputs...................................................................... 99 Table 100. CMOS outputs.................................................................... 100 Table 101. Electrical specifications.............................................................. 100 Table 102. QFN32 5 mm x 5 mm dimensions ...................................................... 104 Table 103. VFQFPN - 32 pins, 5x5 mm, 0.5 mm pitch, very thin fine pitch quad flat no lead mechanical data ........... 105 Table 104. Ordering information scheme.......................................................... 107 Table 105. Document revision history ............................................................ 108 ST25R3911B List of tables DS11793 - Rev 6 page 114/116 |
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