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SPC58NH84C3 Datasheet(PDF) 132 Page - STMicroelectronics |
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SPC58NH84C3 Datasheet(HTML) 132 Page - STMicroelectronics |
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132 / 147 page ![]() Ordering information SPC58EHx, SPC58NHx 132/147 DS12304 Rev 5 6 Ordering information Figure 53. Ordering information scheme Memory Core Product Package 92 N H C3 Example code: Product identifier R SPC58 EH Freq.&T. X Silicon X Packing Custom Security version revision Y= Tray X = Tape and Reel (pin 1 top right) 0=1st version 1=2nd version C = HSM medium E = HSM full H = HSM medium, ASIL-D I = HSM full, ASIL-D 0 = 16x ISO CAN FD, Flexray, 1x100 Mb Eth T = 2x100 Mb Eth G(a) = 1x1 Gb Eth, 1x100 Mb Eth E = 1x100 Mb Eth, eMMC(b), HyperBus P = 2x100 Mb Eth, eMMC(b), HyperBus M(a) = 1x1 Gb Eth, 1x100 Mb Eth, eMMC(b), HyperBus F = 160 MHz at 105 oC H = 200 MHz at 105 oC P = 160 MHz at 125 oC R = 200 MHz at 125 oC E5 = eTQFP144 E7 = eLQFP176 C3 = FPBGA302 C5 = FPBGA386 84 = 6 MB 90 = 8 MB 92 = 10 MB H = SPC58xHx family N = Triple computing e200z4 core (CPU_2 + CPU_1 + CPU_0) E = Dual computing e200z4 core (CPU_2 + CPU_0) SPC58 = Power Architecture in 40 nm a. Gigabit option is not supported on eTQFP144, up to 2x100Mb is available. b. eMMC at 4 bit max. is supported on eLQFP176. eMMC is not supported in eTQFP144. |
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