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R5F5671CDDFM Datasheet(PDF) 11 Page - Renesas Technology Corp |
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R5F5671CDDFM Datasheet(HTML) 11 Page - Renesas Technology Corp |
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11 / 178 page ![]() RX671 Group 1. Overview R01DS0373EJ0110 Rev.1.10 Page 11 of 178 Apr 15, 2022 Note 1. When the realtime clock is not used, initialize the registers in the time clock according to description in section 31.6.8, Initialization Procedure When the Realtime Clock is Not to be Used in the User’s Manual: Hardware. Note 2. The product part number differs according to whether or not the MCU includes an SDHI (SD host interface). Note 3. The product part number differs according to whether or not the MCU includes the encryption function. Note 4. The low CL crystal unit cannot be used when the VBATT voltage is less than 2.0 V. Encryption function Trusted Secure IP (TSIP)*3 • Access management circuit • Encryption engine Common key encryption: AES (compliant with NIST FIPS PUB 197), TDES, ARC4 Public key encryption: RSA, ECC Hash functions: SHA1, SHA224, SHA256, MD5, GHASH • Other features TRNG (true-random number generator) Prevention from illicit copying of a key Operating frequency Up to 120 MHz Power supply voltage VCC = AVCC0 = AVCC1 = VCC_USB = 2.7 to 3.6 V, 2.7 ≤ VREFH0 ≤ AVCC0, VBATT = 1.62*4 to 3.6 V Operating temperature D-version: –40 to +85°C G-version: –40 to +105°C Package 145-pin TFLGA (PTLG0145JC-A) 145-pin TFLGA (PTLG0145KB-A) 144-pin LFQFP (PLQP0144KA-B) 100-pin TFLGA (PTLG0100JB-A) 100-pin LFQFP (PLQP0100KB-B) 64-pin TFBGA (PTBG0064KB-A) 64-pin LFQFP (PLQP0064KB-C) 48-pin HWQFN (PWQN0048KC-A) Debugging interface JTAG and FINE interfaces Table 1.1 Outline of Specifications (10/10) Classification Module/Function Description |
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