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L9788 Datasheet(PDF) 164 Page - STMicroelectronics

Part # L9788
Description  Multifunction IC for automotive engine management system
PDF  264 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L9788 Datasheet(HTML) 164 Page - STMicroelectronics

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LIN/K-LINE interface
L9788
164/264
DS12308 Rev 4
13.3
LIN thermal shut down
The LIN block has a dedicated thermal sensor to protect itself.
To protect LIN block from temperature overheat (high battery range of operation, soft short
conditions, etc.) a dedicated thermal sensor placed close to power mos is present in the
layout sensing FET temperature; one threshold is implemented (T_SD_H) with Hysteresis
(T_SD_hys). When the T_SD_H threshold is detected the Driver switches OFF. Once the
power stage has been switched-off for over-temperature detection, it will be able to switch
on again when temperature is decreased below thermal shut down threshold plus hysteresis
value to avoid high frequency on-off cycling.
13.4
LIN error handling
The Chip provides the following 3 error handling features which are not described in the
standard LIN Spec Rev2.1, but are realized in different stand alone LIN Interface /
microcontrollers to switch the application back to normal operation mode.
The error handling features can be disabled through the LIN_ERR_EN[2:0] (CONFIG-REG
11 D1~D3)bit.
13.4.1
LIN dominant TXD timeout
If TXDC is in dominant state (low) for t > t TXDC_DOM_TO=12ms(typ) the transmitter will
be disabled, status bit LIN_TXD_DOM (Upstream Bit Map Read15 frame 1) will be latched
and can be read and cleared by MSC. The transmitter remains disabled until the status
register is cleared or until the state returns recessive, according to MSC configuration bit
LIN_TX_DOM_ERR_CFG.
13.4.2
LIN permanent recessive
In case TXD changes to dominant (low level) state but RxD signal does not follow within
tLIN1: 40 us (typ), the transmitter is disabled. The status bit LIN_PERM_REC (Upstream Bit
Map Read15 frame 1) is latched and can be read and cleared by MSC. The transmitter
remains disabled until the status register is cleared.
13.4.3
LIN Permanent Dominant
In case the bus state is dominant (low level) for more than tLIN2: 12 ms (typ) a permanent
dominant status is detected. The status bit LIN_PERM_DOM (Upstream Bit Map Read15
frame 1) is latched and can be read and cleared by MSC. The transmitter is not switched off.



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