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TPS36 Datasheet(PDF) 23 Page - Texas Instruments |
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TPS36 Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 33 page ![]() 9.1.2.2 Adjustable Capacitor Timing Adjustable tWD timing is achievable by connecting a capacitor to the CWD pin. If this method is used, please consult Equation 1 for calculating typical tWD values using ideal capacitors. Capacitor tolerances cause the actual device timing to vary such that the minimum of tWD can decrease and the maximum of tWD can increase by the capacitor tolerance. For the most accurate timing, use ceramic capacitors with COG dielectric material. 9.2 Typical Applications 9.2.1 Design 1: Monitoring a Standard Microcontroller for Timeouts This example application uses the TPS3435CDDBBDDFR to monitor a microcontroller to ensure it is not stalled during operation. VDD GND TPS3435 3.3V Microcontroller SET1 VCC WD-EN GND MR SET0 WDI GPIO Copyright © 2022, Texas Instruments Incorporated RESET WDO Figure 9-1. Microcontroller Watchdog Monitoring Circuit 9.2.1.1 Design Requirements PARAMETER DESIGN REQUIREMENT DESIGN RESULT Watchdog Timeout Period Typical timeout period of 40 ms Typical timeout period of 40 ms Watchdog Output Assert Delay Typical output assert of 2 ms Typical output assert of 2 ms Startup Delay Minimum startup delay of 700 ms Minimum startup delay of 900 ms Output logic voltage Open-drain Open-drain Maximum device current consumption 20 µA 250 nA typical, 3.0 μA maximum(1) (1) Only includes the current consumption of the TPS3435. 9.2.1.2 Detailed Design Procedure 9.2.1.2.1 Setting the Watchdog Timeout Period The watchdog timeout design requirement can be met either by using a fixed-timeout version of the TPS3435 or by connecting a capacitor between the CWD pin and GND. The typical values can be met with preprogrammed fixed time options, hence a pinout offering fixed time options is selected. Please see the Section 7.6 for a list of fixed timeouts. If using the CWD feature, please refer to Section 8.3.1.1 for instructions on how to program the timout period. In this application example, the 40 ms timeout watchdog period is achieved by using watchdog time of 10ms (option D) and watchdog time scaling of 4 (option B). Connect SET[1:0] = 0b'10 to select watchdog time scaling of 4. 9.2.1.2.2 Setting Output Assert Delay Please see the Section 7.7 for a list of fixed timeouts. Timeout option B was chosen in order to meet the design requirement for a 2 ms typical timeout. 9.2.1.2.3 Setting the Startup Delay Startup delay option D is chosen, which offers a startup delay of 1 s. This accounts for the minimum specification of 700 ms. www.ti.com TPS3435 SNVSCF7 – DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: TPS3435 |
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