9.2.1.2.4 Calculating the WDO Pullup Resistor

The TPS3435 uses an open-drain configuration for the WDO output, as shown in Figure 9-2. When the FET is

off, the resistor pulls the drain of the transistor to VDD and when the FET is turned on, the FET pulls the output

to ground, thus creating an effective resistor divider. The resistors in this divider must be chosen to ensure that

VOL is below its maximum value. To choose the proper pullup resistor, there are three key specifications to keep

in mind: the pullup voltage (VPU), the recommended maximum WDO pin current (ISink), and VOL. The maximum

VOL is 0.3 V, meaning that the effective resistor divider created must be able to bring the voltage on the reset

pin below 0.3 V with ISink kept below 2 mA for VDD ≥ 3 V and 500 μA for VDD = 1.5 V. For this example, with

a VPU =VDD = 1.5 V, a resistor must be chosen to keep ISink below 500 μA because this value is the maximum

consumption current allowed. To ensure this specification is met, a pullup resistor value of 10 kΩ was selected,

which sinks a maximum of 150 μA when WDO is asserted.

WDO

VDD

WDO

CONTROL

Figure 9-2. Open-Drain WDO Configuration

9.2.1.3 Application Curves

Figure 9-3. Typical WDI Pulse

Figure 9-4. Watchdog Timeout Fault

10 Power Supply Recommendations

This device is designed to operate from an input supply with a voltage range between 1.04 V and 6.5 V. An input

supply capacitor is not required for this device; however, if the input supply is noisy, then good analog practice is

to place a 0.1-µF capacitor between the VDD pin and the GND pin.

TPS3435

SNVSCF7 – DECEMBER 2022

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