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MB90F474LPF Datasheet(PDF) 48 Page - fujitsu semiconductor |
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MB90F474LPF Datasheet(HTML) 48 Page - fujitsu semiconductor |
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48 / 118 page ![]() MB90470 Series 48 7. DTP/External Interrupts The DTP (Data Transfer Peripheral) is a peripheral block that interfaces external peripherals to the F2MC-16L CPU. The DTP receives DMA request from external peripherals and passes the requests to the F2MC-16L CPU to activate the extended µDMA or interrupt processing. (1) Register Descriptions (2) Block Diagram Interrupt/DTP enable register (ENIR : Enable Interrupt Request Register) Interrupt/DTP source register (EIRR : External Interrupt Request Register) Request level setting register (ELVR : External Level Register) ENIR Default value Address : 00000CH 00000000B EIRR Default value Address : 00000DH 00000000B (note that both registers relate to different interrupts) Default value Address : 00000EH 00000000B Default value Address : 00000FH 00000000B 76 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W EN6 EN7 EN5 EN4 EN3 EN2 EN1 EN0 15 14 13 12 11 10 9 8 R/W R/W R/W R/W R/W R/W R/W R/W ER6 ER7 ER5 ER4 ER3 ER2 ER1 ER0 76 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W LA3 LB3 LB2 LA2 LB1 LA1 LB0 LA0 15 14 13 12 11 10 9 8 R/W R/W R/W R/W R/W R/W R/W R/W LA7 LB7 LB6 LA6 LB5 LA5 LB4 LA4 4 Interrupt/DTP enable register Interrupt/DTP source register Interrupt level setting register F2MC-16 bus 4 4 8 4 Gate Source F/F Edge detection circuit Request input |
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