MB90F474LPF datasheet(16/118 Pages) FUJITSU

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MB90470 Series

s HANDLING DEVICES

(1) Strictly observe maximum rated voltages (prevent latchup)

When CMOS integrated circuit devices are subjected to applied voltages higher than VCC at input and output

pins other than medium- and high-withstand voltage pins, or to voltages lower than VSS, or when voltages in

excess of rated levels are applied between VCC and VSS, a phenomenon known as latchup can occur. In a latchup

condition, supply current can increase dramatically and may destroy semiconductor elements. In using

semiconductor devices, always take sufficient care to avoid exceeding maximum ratings.

Also care must be taken when power to analog systems is switched on or off, to ensure that the analog power

supply (AVCC, AVRH) and analog input do not exceed the digital power supply (VCC) .

(2) Treatment of unused pins

If unused input pins are left open, abnormal operation or latchup may cause permanent damage to the

semiconductor. Any such pins should be pulled up or pulled down through resistance of at least 2 k

Ω.

Also any unused input/output pins should be left open in output status, or if set to input status should be treated

in the same way as input pins.

(3) Precautions for use of external clock signals

Even when an external clock is used, a stabilization period is required following a power-on reset or release

from sub clock mode or stop mode. Also, when an external clock is used 20 MHz should be used as a guideline

for an upper frequency limit.

The following figure shows a sample use of external clock signals.

(4) Power supply pins

When using multiple VCC/VSS sources, always make sure to design devices with external connections of all power

supply pins to supply or ground elements, in order to prevent latchup, reduce unwanted radiation, and prevent

abnormal strobe signal operation due to rise in ground level, as well as to maintain total rated output current. In

addition, care must be given to connecting the VCC and VSS pins of this device to a current source with as little

impedance as possible. It is recommended that a bypass capacitor of 1.0

µF be connected between VCC and

VSS as close to the pins as possible.

(5) Crystal oscillator circuits

Abnormal operation of this device can result from noise in the proximity of the X0/X1 and X0A/X1A pins. For

stable operation, it is strongly recommended that the printed circuit artwork provide capacitors placed as close

as possible between the X0/X1, X0A/X1A and crystal oscillator (or ceramic oscillator) as well as ground, and be

wired so as to avoid crossing other wiring wherever possible.

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