| Electronic Components Datasheet Search |
|
MB90F474LPF Datasheet(PDF) 93 Page - fujitsu semiconductor |
|
|
|||||||||||||||||||||||||||||
MB90F474LPF Datasheet(HTML) 93 Page - fujitsu semiconductor |
|
93 / 118 page ![]() MB90470 Series 93 (5) Bus read timing (VCC = 2.7 V to 3.6 V, VSS = 0.0 V, TA = −40 °C to +85 °C) Notes : • tCP : See (1) Clock Timing Ratings. • VCC = VCC3 = VCC5 Parameter Sym- bol Pin name Condi- tions Value Unit Remarks Min Max ALE pulse width tLHLL ALE tCP / 2 − 15 ns at fcp = 20 MHz tCP / 2 − 20 ns at fcp = 16 MHz tCP / 2 − 35 ns at fcp = 8 MHz Valid address → ALE ↓ time tAVLL Address pins, ALE tCP / 2 − 20 ns tCP / 2 − 40 ns at fcp = 8 MHz ALE ↓ → address valid time tLLAX ALE, Address pins tCP / 2 − 15 ns Valid address → RD ↓ time tAVRL RD, address tCP − 20 ns Valid address → valid data input tAVDV Address/data 5 tCP / 2 − 60 ns 5 tCP / 2 − 80 ns at fcp = 8 MHz RD pulse width tRLRH RD 3 tCP / 2 − 25 ns at fcp = 20 MHz 3 tCP / 2 − 20 ns at fcp = 16 MHz RD ↓ → valid data input tRLDV RD, Data 3 tCP / 2 − 60 ns 3 tCP / 2 − 80 ns at fcp = 8 MHz RD ↑ → data hold time tRHDX RD, Data 0 ns RD ↑ → ALE ↑ time tRHLH RD, ALE tCP / 2 − 15 ns RD ↑ → address valid time tRHAX Address, RD tCP / 2 − 10 ns Valid address → CLK ↑ time tAVCH Address, CLK tCP / 2 − 20 ns RD ↓ → CLK ↑ time tRLCH RD, CLK tCP / 2 − 20 ns ALE ↓ → RD ↓ time tLLRL RD, ALE tCP / 2 − 15 ns |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |