STM32C011F6U6 datasheet(16/94 Pages) STMICROELECTRONICS

16 / 94 page

Functional overview

STM32C011x4/x6

16/94

DS13866 Rev 3

3.9

Clocks and startup

The clock controller distributes the clocks coming from different oscillators to the core and

the peripherals. It also manages clock gating for low-power modes and ensures clock

robustness. It features:

•

Clock prescaler: to get the best trade-off between speed and current consumption,

the clock frequency to the CPU and peripherals can be adjusted by a programmable

prescaler

•

Safe clock switching: clock sources can be changed safely on the fly in run mode

through a configuration register.

•

Clock management: to reduce power consumption, the clock controller can stop the

clock to the core, individual peripherals or memory.

•

System clock source: the clock following sources can deliver SYSCLK system clock:

–

4-48 MHz high-speed oscillator with external crystal or ceramic resonator (HSE).

The HSE can also be configured in bypass mode for an external clock.

–

48 MHz high-speed internal RC oscillator (HSI48), trimmable by software.

–

LSE - a low-speed oscillator with external crystal (32768 Hz)

–

LSI - an internal low-speed RC oscillator (32 kHz)

Table 4. Interconnect of peripherals

Interconnect source

Interconnect

destination

Interconnect action

Run Sleep Stop

TIMx

Timer synchronization or chaining

ADCx

Conversion triggers

DMA

Memory-to-memory transfer trigger

ADCx

TIM1

Timer triggered by analog watchdog

RTC

TIM16

Timer input channel from RTC events

All clock sources (internal and

external)

TIM14,16,17

Clock source used as input channel for

RC measurement and trimming

CSS

RAM (parity error)

TIM1,16,17

Timer break

CPU (hard fault)

TIM1,16,17

Timer break

GPIO

TIM1,3

External trigger

ADC

Conversion external trigger

STM32C011F6U6 Datasheet(PDF) 16 Page - STMicroelectronics

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