IIS2ICLX datasheet(18/119 Pages) STMICROELECTRONICS

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5.3.2

SPI write

Figure 11. SPI write protocol (in mode 3)

SPC

SDI

DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0

AD5 AD4 AD3 AD2 AD1 AD0

AD6

The SPI Write command is performed with 16 clock pulses. A multiple byte write command is performed by

adding blocks of 8 clock pulses to the previous one.

bit 0: WRITE bit. The value is 0.

bit 1-7: address AD(6:0). This is the address field of the indexed register.

bit 8-15: data DI(7:0) (write mode). This is the data that is written inside the device (MSb first).

bit 16-... : data DI(...-8). Further data in multiple byte writes.

Figure 12. Multiple byte SPI write protocol (2-byte example) (in mode 3)

SPC

SDI

AD5 AD4 AD3 AD2 AD1 AD0

DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI8

AD6

5.3.3

SPI read in 3-wire mode

A 3-wire mode is entered by setting the CTRL3_C (12h) (SIM) bit equal to 1 (SPI serial interface mode selection).

Figure 13. SPI read protocol in 3-wire mode (in mode 3)

SPC

SDI/O

DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0

AD5 AD4 AD3 AD2 AD1 AD0

AD6

The SPI read command is performed with 16 clock pulses:

bit 0: READ bit. The value is 1.

bit 1-7: address AD(6:0). This is the address field of the indexed register.

bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).

A multiple read command is also available in 3-wire mode.

IIS2ICLX

SPI bus interface

DS13005 - Rev 7

page 18/119

IIS2ICLX Datasheet(PDF) 18 Page - STMicroelectronics