DSP56307SLASHD datasheet(43/156 Pages) NXP

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Specifications

External Clock Operation

MOTOROLA

DSP56307 Technical Data

2-7

Figure 2-2

External Clock Timing

Table 2-5

Clock Operation

No.

Characteristics

Symbol

100 MHz

Min

Max

Frequency of EXTAL (EXTAL pin frequency)

The rise and fall time of this external clock should

be 3 ns maximum.

100.0

EXTAL input high1, 2

With PLL disabled (46.7%Ð53.3% duty

cycle3)

With PLL enabled (42.5%Ð57.5% duty

cycle3)

ETH

4.67 ns

4.25 ns

∞

157.0

µs

EXTAL input low1, 2

With PLL disabled (46.7%Ð53.3% duty

cycle3)

With PLL enabled (42.5%Ð57.5% duty

cycle3)

ETL

4.67 ns

4.25 ns

∞

157.0

µs

EXTAL cycle time2

With PLL disabled

With PLL enabled

ETC

10.00 ns

∞

273.1

µs

CLKOUT change from EXTAL fall with PLL

disabled

4.3 ns

11.0 ns

EXTAL

VILC

VIHC

Midpoint

Note:

The midpoint is 0.5 (VIHC + VILC).

ETH

ETL

ETC

CLKOUT With

PLL Disabled

CLKOUT With

PLL Enabled

AA0459

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

Not Recommended for New Design

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