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MPC750EC/D Datasheet(PDF) 28 Page - NXP Semiconductors |
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MPC750EC/D Datasheet(HTML) 28 Page - NXP Semiconductors |
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28 / 44 page ![]() 28 MPC750A RISC Microprocessor Hardware Specifications Pinout Listings L2WE N16 Low Output L2ZZ G17 High Output LSSD_MODE1 F9 Low Input MCP B11 Low Input NC (No–Connect) B3, B4, B5, A19, W19, W1, K9, K114, K194 —— OVDD D5, D8, D12, E4, E6, E9, E11, F5, H4, J5, L5, M4, P5, R4, R6, R9, R11, T5, T8, T12 —— PLL_CFG[0–3] A4, A5, A6, A7 High Input QACK B2 Low Input QREQ J3 Low Output RSRV D3 Low Output SMI A12 Low Input SRESET E10 Low Input SYSCLK H9 — Input TA F1 Low Input TBEN A2 High Input TBST A11 Low I/O TCK B10 High Input TDI B7 High Input TDO D9 High Output TEA J1 Low Input TLBISYNC A3 Low Input TMS C8 High Input TRST A10 Low Input TS K7 Low I/O TSIZ[0–2] A9, B9, C9 High Output TT[0–4] C10, D11, B12, C12, F11 High I/O WT C3 Low Output VDD 2 G8, G10, G12, J8, J10, J12, L8, L10, L12, N8, N10, N12 — — VOLTDET 3 K13 High Output Notes: 1. These are test signals for factory use only and must be pulled up to OVdd for normal machine operation. 2. OVdd inputs supply power to the I/O drivers and Vdd inputs supply power to the processor core. 3. Internally tied to L2OVDD in the MPC750 CBGA package to indicate the power present at the L2 cache interface. This signal is not a power supply input. Caution: This is different from the MPC740 CBGA package. 4. These pins are reserved for potential future use as additional L2 address pins. Table 16. Pinout Listing for the MPC750, 360 CBGA Package (Continued) Signal Name Pin Number Active I/O Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com AR CH IVE D B Y F RE ES CA LE SE MI CO ND UC TO R, INC . |
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