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PIC18F6410E/PTSQTP Datasheet(PDF) 111 Page - Microchip Technology

Part # PIC18F6410E/PTSQTP
Description  64/80-Pin Flash Microcontrollers with nanoWatt Technology
PDF  404 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F6410E/PTSQTP Datasheet(HTML) 111 Page - Microchip Technology

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 2004 Microchip Technology Inc.
Preliminary
DS39635A-page 109
PIC18F6310/6410/8310/8410
9.3
PIE Registers
The PIE registers contain the individual enable bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are three Peripheral
Interrupt Enable registers (PIE1, PIE2, PIE3). When
IPEN = 0, the PEIE bit must be set to enable any of
these peripheral interrupts.
REGISTER 9-7:
PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
PSPIE
ADIE
RC1IE
TX1IE
SSPIE
CCP1IE
TMR2IE
TMR1IE
bit 7
bit 0
bit 7
PSPIE: Parallel Slave Port Read/Write Interrupt Enable bit
1
= Enables the PSP read/write interrupt
0
= Disables the PSP read/write interrupt
bit 6
ADIE: A/D Converter Interrupt Enable bit
1
= Enables the A/D interrupt
0
= Disables the A/D interrupt
bit 5
RC1IE: EUSART Receive Interrupt Enable bit
1
= Enables the EUSART receive interrupt
0
= Disables the EUSART receive interrupt
bit 4
TX1IE: EUSART Transmit Interrupt Enable bit
1
= Enables the EUSART transmit interrupt
0
= Disables the EUSART transmit interrupt
bit 3
SSPIE: Master Synchronous Serial Port Interrupt Enable bit
1
= Enables the MSSP interrupt
0
= Disables the MSSP interrupt
bit 2
CCP1IE: CCP1 Interrupt Enable bit
1
= Enables the CCP1 interrupt
0
= Disables the CCP1 interrupt
bit 1
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1
= Enables the TMR2 to PR2 match interrupt
0
= Disables the TMR2 to PR2 match interrupt
bit 0
TMR1IE: TMR1 Overflow Interrupt Enable bit
1
= Enables the TMR1 overflow interrupt
0
= Disables the TMR1 overflow interrupt
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown



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