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S75WS256NDFBAWMB Datasheet(PDF) 158 Page - SPANSION

Part # S75WS256NDFBAWMB
Description  Stacked Multi-Chip Product (MCP)
PDF  216 Pages
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S75WS256NDFBAWMB Datasheet(HTML) 158 Page - SPANSION

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S75WS256Nxx Based MCPs
S75WS-N-00_A0 February 17, 2005
Ad van c e
Inf o rmation
30 Low-Power Operation
30.1 Standby Mode Operation
During standby, the device current consumption is reduced to the level necessary to perform the
DRAM refresh operation. Standby operation occurs when CE# is High.
The device will enter a reduced power state upon completion of a Read or Write operation, or
when the address and control inputs remain static for an extended period of time. This mode will
continue until a change occurs to the address or control inputs.
30.2 Temperature Compensated Refresh
Temperature compensated refresh (TCR) is used to adjust the refresh rate depending on the de-
vice operating temperature. DRAM technology requires increasingly frequent refresh operation to
maintain data integrity as temperatures increase. More frequent refresh is required due to in-
creased leakage of the DRAM capacitive storage elements as temperatures rise. A decreased
refresh rate at lower temperatures will facilitate a savings in standby current.
TCR allows for adequate refresh at four different temperature thresholds (+15
°C, +45°C, +70°C,
and +85
°C). The setting selected must be for a temperature higher than the case temperature
of the CellularRAM device. For example, if the case temperature is 50
°C, the system can minimize
self refresh current consumption by selecting the +7
°0C setting. The +15°C and +45°C settings
would result in inadequate refreshing and cause data corruption.
30.3 Partial Array Refresh
Partial array refresh (PAR) restricts refresh operation to a portion of the total memory array. This
feature enables the device to reduce standby current by refreshing only that part of the memory
array required by the host system. The refresh options are full array, one-half array, one-quarter
array, three-quarter array, or none of the array. The mapping of these partitions can start at either
the beginning or the end of the address map (Table 31.6). Read and Write operations to address
ranges receiving refresh will not be affected. Data stored in addresses not receiving refresh will
become corrupted. When re-enabling additional portions of the array, the new portions are avail-
able immediately upon writing to the RCR.
30.4 Deep Power-Down Operation
Deep power-down (DPD) operation disables all refresh-related activity. This mode is used if the
system does not require the storage provided by the CellularRAM device. Any stored data will be-
come corrupted when DPD is enabled. When refresh activity has been re-enabled by rewriting the
RCR, the CellularRAM device will require 150µs to perform an initialization procedure before nor-
mal operations can resume. During this 150µs period, the current consumption will be higher than
the specified standby levels, but considerably lower than the active current specification.
DPD cannot be enabled or disabled by writing to the RCR using the software access sequence;
the RCR should be accessed using CRE instead.



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