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UPD75P218KB Datasheet(PDF) 9 Page - Renesas Technology Corp |
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UPD75P218KB Datasheet(HTML) 9 Page - Renesas Technology Corp |
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9 / 38 page ![]() 7 µPD75P218 Fig. 1-1 Pin Input/Output Circuit VDD P-ch N-ch P-ch VDD VLOAD OUT VDD P-ch N-ch IN IN VDD P-ch N-ch OUT Output disable Data Data Type D Data Output disable IN/OUT Type A Type D Data Output disable IN/OUT Type B VDD P-ch N-ch Type B IN/OUT Data P-ch output disable VDD P-ch N-ch Data P-ch VDD OUT TYPE A TYPE B TYPE D TYPE E TYPE F TYPE G TYPE I-D TYPE I-E CMOS input buffer Schmitt trigger input with hysteresis Push-pull output which can be set to high-impedance output (off for both P-ch and N-ch) I/O circuit consisting of push-pull output of Type D and input buffer of Type A I/O circuit that can switch the push-pull output or N-ch open drain output (off for P-ch) I/O circuit consisting of push-pull output of Type D and Schmitt trigger of Type B Pull-down resistor |
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