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UPD75P218KB Datasheet(PDF) 21 Page - Renesas Technology Corp |
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UPD75P218KB Datasheet(HTML) 21 Page - Renesas Technology Corp |
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21 / 38 page  19 µPD75P218 DC Characteristics (Ta = –40 to +70 ˚C, V DD = 2.7 to 6.0 V) Parameter High-level input voltage Low-level input voltage High-level output voltage Low-level output voltage High-level input leakage current Low-level input leakage current High-level output leakage current Low-level output leakage current Display output current On-chip pull-down resistor Note 1 Power supply current MAX. VDD VDD VDD VDD VDD 0.3VDD 0.2VDD 0.4 2.0 0.4 0.5 3 20 –3 –20 3 –3 –10 135 18.0 2.5 4000 1350 12.0 1.5 2700 900 300 60 15 20 10 Unit V V V V V V V V V V V V V µA µA µA µA µA µA µA mA mA k Ω mA mA µA µA mA mA µA µA µA µA µA µA µA TYP. 0.4 –5.5 –22 70 6.5 0.85 1350 450 4.0 0.55 900 300 100 20 5 0.5 0.1 MIN. 0.7VDD 0.75VDD VDD – 0.4 0.65VDD 0.7VDD 0 0 0 VDD – 1.0 VDD – 0.5 –3 –15 25 Symbol VIH1 VIH2 VIH3 VIH4 VIL1 VIL2 VIL3 VOH VOL ILIH1 ILIH2 ILIL1 ILIL2 ILOH ILOL1 ILOL2 IOD RL IDD1 IDD2 IDD1 IDD2 IDD3 IDD4 IDD5 Conditions All except ports 0, 1, 6; X1, X2, XT1, RESET Port 0, 1, RESET X1, X2, XT1 Port 6 All except ports 0, 1, 6; X1, X2, XT1, RESET Port 0, 1, 6, RESET X1, X2, XT1 All outputs Port 4, 5 All outputs All except X1, X2, XT1 X1, X2, XT1 All except X1, X2, XT1 X1, X2, XT1 All outputs All except display outputs Display outputs S0-S9 T0-T15 Display outputs 6.0 MHz crystal oscillator 4.19 MHz crystal oscillator C1 = C2 = 15 pF Note 4 32kHz crystal oscillator XT1 = 0 V STOP mode VDD = 4.5 to 6.0 V VDD = 4.5 to 6.0 V, IOH = –1 mA IOH = –100 µA VDD = 4.5 to 6.0 V, IOL = 15 mA VDD = 4.5 to 6.0 V, IOL = 1.6 mA IOL = 400 µA VIN = VDD VIN = 0 V VOUT = VDD VOUT = 0 V VOUT = VLOAD = VDD – 35 V VDD = 4.5 to 6.0 V VOD = VDD – 2 V VOD – VLOAD = 35 V VDD = 5 V ± 10 % Note 2 VDD = 3 V ± 10 % Note 3 HALT mode VDD = 5 V ± 10 % VDD = 3 V ± 10 % VDD = 5 V ± 10 % Note 2 VDD = 3 V ± 10 % Note 3 HALT mode VDD = 5 V ± 10 % VDD = 3 V ± 10 % VDD = 3 V ± 10 % HALT mode VDD = 3 V ± 10 % STOP mode VDD = 3 V ± 10 % VDD = 5 V ± 10 % VDD = 3 V ± 10 % Notes 1. Does not include pull-down resistor current. 2. Value during high-speed operation and when the processor clock control (PCC) register is set to 0011. 3. Value during low-speed operation and when the PCC register is set to 0000. 4. Value when the system clock control register (SCC) is set to 1001, generation of the main system clock pulse is stopped, and the CPU is operated by the subsystem clock pulse. |
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