UPD703003A datasheet(20/45 Pages) RENESAS

20 / 45 page

µPD703003A, 703004A, 703025A, 703003A(A), 703025A(A)

Data Sheet U13188EJ6V1DS

DC Characteristics (TA = –40 to +85

°C, VDD = 5.0 V ±10%, VSS = 0 V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Input voltage, high

VIH

Except for X1 and pins listed in Note1

2.2

VDD + 0.3

Note 1

0.8VDD

VDD + 0.3

Input voltage, low

VIL

Except for X1 and pins listed in Note1

–0.5

+0.8

Note 1

–0.5

0.2VDD

Clock input voltage, high

VXH

0.8VDD

VDD + 0.5

Clock input voltage, low

VXL

–0.5

+0.6

Schmitt-triggered input

VT+

Note 1, rising edge

3.0

Threshold voltage

VT–

Note 1, falling edge

2.0

Schmitt-triggered input hysteresis width VT+ – VT–

Note 1

0.5

Output voltage, high

VOH

IOH = –2.5 mA

0.7VDD

IOH = –100

µAVDD – 0.4

Output voltage, low

VOL

IOL = 2.5 mA

0.45

Input leakage current, high

ILIH

VI = VDD

µA

Input leakage current, low

ILIL

VI = 0 V

–10

µA

Output leakage current, high

ILOH

VO = VDD

µA

Output leakage current, low

ILOL

VO = 0 V

–10

µA

Software pull-up resistor

P35 to P37 and their

Ω

alternate-function pins

Power

µPD703003A, When

IDD1

Direct mode

1.9

φ + 5 2.1 × φ + 17

supply 703004A,

operating

PLL mode

2.0

φ + 7 2.2 × φ + 20

current

703003A(A)

IDD2

Direct mode

1.2

φ + 5 1.3 × φ + 13 mA

HALT mode

PLL mode

1.3

φ + 7 1.4 × φ + 15 mA

IDD3

Direct mode

φ + 300 10 × φ + 500

µA

IDLE mode

PLL mode

0.1

φ + 2 0.2 ×

φ + 3

IDD4

Note 2

250

µA

STOP mode

Note 3

200

µA

µPD703025A, When

IDD1

Direct mode

2.5

φ + 2 2.8 × φ + 16.5

703025A(A)

operating

PLL mode

2.6

φ + 4 2.9 × φ +19.5 mA

IDD2

Direct mode

1.3

φ + 5 1.4 × φ + 13 mA

HALT mode

PLL mode

1.3

φ + 10 1.4 × φ + 18 mA

IDD3

Direct mode

φ + 300 10 × φ + 500

µA

IDLE mode

PLL mode

0.1

φ + 2 0.2 ×

φ + 3

IDD4

Note 2

250

µA

STOP mode

Note 3

200

µA

Notes 1. P02 to P07, P12 to P17, P23, P24, P26, P27, P32 to P37, P112 to P117, RESET, NMI, MODE, and

their alternate-function pins.

2. –40

°C ≤ TA ≤ +50°C

3. 50

°C < TA ≤ 85°C

Remarks 1. TYP. values are reference values for when TA = 25

°C (except for the conditions in Note 3) and VDD

= 5.0 V. The power supply current does not include AVREF1 to AVREF3 or the current that flows through

software pull-up resistors.

φ = Internal system clock frequency

UPD703003A Datasheet(PDF) 20 Page - Renesas Technology Corp

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