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WM8753LGEFL/V Datasheet(PDF) 74 Page - Wolfson Microelectronics plc |
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WM8753LGEFL/V Datasheet(HTML) 74 Page - Wolfson Microelectronics plc |
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74 / 92 page ![]() Pre-Production WM8753L w PP Rev 3.4 November 2005 74 SAVING POWER AT LOW SUPPLY VOLTAGES The analogue supplies to the WM8753L can run from 1.8V to 3.6V. By default, all analogue circuitry on the device is optimized to run at 3.3V. This set-up is also good for all other supply voltages down to 1.8V. However, at lower voltages, it is possible to save power by reducing the internal bias currents used in the analogue circuitry. This is controlled as shown below. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R18 (12h) Additional Control 7:6 VSEL [1:0] 11 Analogue Bias optimization 00: Lowest bias current, optimized for AVDD=1.8V 01: Low bias current, optimized for AVDD=2.5V 1X: Default bias current, optimized for AVDD=3.3V SAVING POWER BY REDUCING OVERSAMPLING RATE The default mode of operation of the ADC and DAC digital filters is in 64x oversampling mode. Under the control of ADCOSR and DACOSR the oversampling rate may be doubled. 64x oversampling results in a slight decrease in noise performance compared to 128x but lowers the power consumption of the device. Important: ADC 64x mode is not available in USB mode (USB = 1). In USB mode ADCOSR must be set to ‘0’. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 2 VXDACOSR 1 Voice DAC oversample rate select 1 = 64x (lowest power) 0 = 128x (best SNR) 1 ADCOSR 1 ADC oversample rate select 1 = 64x (lowest power) 0 = 128x (best SNR) R7 (07h) Sample Rate Control (2) 0 DACOSR 1 DAC oversample rate select 1 = 64x (lowest power) 0 = 128x (best SNR) Table 70 ADC and DAC Oversampling Rate Selection SAVING POWER BY REDUCING BIAS CURRENTS There are various biasing options within the WM8753L for increasing or reducing the bias current that is used by sections of the chip. The control of these is via the register bits MBIASBOOST, VDACBIASX0P5, MICBIASBST, BUFBIAS, IPBIASX0P5, ADCBIAS, OPBIASX0P5 and DMBIASX0P5 as shown in Figure 31. The performance of the chip may vary when the bias currents are changed from the default. |
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