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T89C51RC2-3CSIM Datasheet(PDF) 59 Page - ATMEL Corporation |
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T89C51RC2-3CSIM Datasheet(HTML) 59 Page - ATMEL Corporation |
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59 / 117 page ![]() 59 T89C51RB2/RC2 4105D–8051–10/06 Keyboard Interface The T89C51RB2/RC2 implements a keyboard interface allowing the connection of a 8 x n matrix keyboard. It is based on 8 inputs with programmable interrupt capability on both high or low level. These inputs are available as alternate function of P1 and allow to exit from idle and power down modes. The keyboard interface interfaces with the C51 core through 3 special function registers: KBLS, the Keyboard Level Selection register (Table 44), KBE, The Keyboard interrupt Enable register (Table 43), and KBF, the Keyboard Flag register (Table 42). Interrupt The keyboard inputs are considered as 8 independent interrupt sources sharing the same interrupt vector. An interrupt enable bit (KBD in IE1) allows global enable or dis- able of the keyboard interrupt (see Figure 22). As detailed in Figure 23 each keyboard input has the capability to detect a programmable level according to KBLS. x bit value. Level detection is then reported in interrupt flags KBF. x that can be masked by software using KBE. x bits. This structure allow keyboard arrangement from 1 by n to 8 by n matrix and allow usage of P1 inputs for other purpose. Figure 22. Keyboard Interface Block Diagram Figure 23. Keyboard Input Circuitry Power Reduction Mode P1 inputs allow exit from idle and power down modes as detailed in Section “Power- down Mode”, page 76. P1:x KBE. x KBF. x KBLS. x 0 1 Vcc Internal Pullup P1.0 Keyboard Interface Interrupt Request KBD IE1 Input Circuitry P1.1 Input Circuitry P1.2 Input Circuitry P1.3 Input Circuitry P1.4 Input Circuitry P1.5 Input Circuitry P1.6 Input Circuitry P1.7 Input Circuitry KBDIT |
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