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PCM3060PWR Datasheet(PDF) 19 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation. Click here to check the latest version.
Part # PCM3060PWR
Description  24-BIT, 96/192-kHz ASYNCHRONOUS STEREO AUDIO CODEC
PDF  45 Pages
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Manufacturer  BURR-BROWN [Burr-Brown (TI)]
Direct Link  http://www.burr-brown.com
Logo BURR-BROWN - Burr-Brown (TI)

PCM3060PWR Datasheet(HTML) 19 Page - Burr-Brown (TI)

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PCM AUDIO INTERFACE
Audio Interface Mode and Timing
DOUT
0.5 V
DD
1.4 V
1.4 V
DIN
1.4 V
BCK1/2
(Input)
LRCK1/2
(Input)
t
(BCY)
t
(DIH)
t
(BCH)
t
(BCL)
t
(LRS)
t
(DIS)
t
(DOD)
T0247-01
t
(LRH)
PCM3060
SLAS533 – MARCH 2007
The digital audio data can be interfaced in either slave or master mode, and this interface mode is selectable
using the serial mode control described in the Mode Control section.
The interface mode is also selectable independently for the ADC and the DAC. DIN is always input to the
PCM3060 and DOUT is always an output from the PCM3060. Slave mode is the default mode for both the ADC
and the DAC.
In slave mode, BCK1/2 and LRCK1/2 are inputs to the PCM3060, and BCK1/2 must be either 64 fS or 48 fS. DIN
is sampled on the rising edge of BCK2, and DOUT is changed on the falling edge of BCK1. The default timing
specification is shown in Figure 24.
In master mode, BCK1/2 and LRCK1/2 are outputs from the PCM3060. BCK1/2 and LRCK1/2 are generated by
the PCM3060 from SCKI1/2, and BCK1/2 is fixed at 64 fS. DIN is sampled on the rising edge of BCK2, and
DOUT is changed on the falling edge of BCK1. The detailed timing specification is shown in Figure 25.
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNIT
t(BCY)
BCK1/2 cycle time
75
ns
tw (BCH)
BCK1/2 high time
35
ns
tw (BCL)
BCK1/2 low time
35
ns
t(LRS)
LRCK1/2 set-up time to BCK1/2 rising edge
10
ns
t(LRH)
LRCK1/2 hold time to BCK1/2 rising edge
10
ns
t(DIS)
DIN setup time to BCK1/2 rising edge
10
ns
t(DIH)
DIN hold time to BCK1/2 rising edge
10
ns
t(DOD)
DOUT delay time from BCK1/2 falling edge
15
70
ns
NOTE: Load capacitance of output is 20 pF.
Figure 24. Audio Data Interface Timing (Slave Mode: BCK1/2 and LRCK1/2 Work as Inputs)
19
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