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PCM3060PWR Datasheet(PDF) 33 Page - Burr-Brown (TI) |
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PCM3060PWR Datasheet(HTML) 33 Page - Burr-Brown (TI) |
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33 / 45 page ![]() www.ti.com PCM3060 SLAS533 – MARCH 2007 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Register 67 0 1 0 0 0 0 1 1 CSEL2 M/S 22 M/S 21 M/S 20 RSV RSV FMT21 FMT20 CSEL2: Clock Select for DAC Operation Default value: 0 (SCKI2, BCK2, LRCK2 enabled for DAC operation) CSEL2 = 0 SCKI2, BCK2, LRCK2 enabled for DAC operation (default) CSEL2 = 1 SCKI1, BCK1, LRCK1 enabled for DAC operation The CSEL2 bit controls system clock and audio interface clocks for the DAC operation. SCKI2, BCK2, LRCK2 are used for the DAC portion if CSEL2 = 0 (default), and SCKI1, BCK1, LRCK1 are used for DAC operation if CSEL2 = 1. M/S 2[2:0]: Audio Interface Mode for DAC Default value: 000 (slave mode) M/S 2[2:0] Audio Interface Mode for DAC 0 0 0 Slave mode (default) 0 0 1 Master mode, 768 fS 0 1 0 Master mode, 512 fS 0 1 1 Master mode, 384 fS 1 0 0 Master mode, 256 fS 1 0 1 Master mode, 192 fS 1 1 0 Master mode, 128 fS 1 1 1 Reserved The M/S 2[2:0] bits control the audio interface mode for the DAC. FMT2[1:0]: Audio Interface Format for DAC Default value: 00 (I2S Mode) FMT2[1:0] Audio Interface Format for DAC 0 0 24-bit I2S format (default) 0 1 24-bit left-justified format 1 0 24-bit right-justified format 1 1 16-bit right-justified format The FMT2[1:0] bits control the audio interface format for the DAC. 33 Submit Documentation Feedback |
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