PCM3060PWR datasheet(30/45 Pages) BURR-BROWN

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PCM3060

SLAS533 – MARCH 2007

B15

B14

B13

B12

B11

B10

MRST

SRST

ADPSV

DAPSV

RSV

S/E

MRST: Mode Control Register Reset (ADC and DAC)

Default value: 1

MRST = 0

Set default value

MRST = 1

Normal operation (default)

The MRST bit controls reset of the mode control registers to their default values. Pop noise may be generated.

Returning the MRST bit to 1 is not required, as the MRST bit is automatically set to 1 after a mode control

SRST: System Reset (ADC and DAC)

Default value: 1

SRST = 0

Resynchronization

SRST = 1

Normal operation (default)

The SRST bit controls system reset, the relation between system clock and sampling clock is re-synchronized,

and ADC operation and DAC operation is restarted. The mode control register is not reset and the PCM3060

does not go into power down state, but pop-noise may be generated. Returning the SRST bit to 1 is not

required, as the SRST bit is automatically set to 1 after triggering a system reset.

ADPSV: ADC Power-Save Control (ADC)

Default value: 1

ADPSV = 0

Normal operation

ADPSV = 1

Power-save mode (default)

The ADPSV bit controls the ADC power-save mode. In power-save mode, DOUT is forced to ZERO with a

fade-out sequence, the internal ADC data are reset, and the ADC goes into the power-down state. For

power-save mode release, a fade-in sequence is applied on DOUT during the resume process. The serial mode

control is enabled during this mode. A waiting time of more than 2048/fS is required for the proper status change

by this power save control on/off. As the default state after power on is the power-save mode and DOUT is

disabled (ZERO), release from the power-save mode is required for normal operation. The detailed sequence

and timing for ADPSV control is shown Figure 22 and Figure 23.

NOTE:

It is recommended that changing/stopping clocks or changing the audio interface

mode be performed in power-down mode in order to avoid unexpected pop/click

noise and performance degradation.

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