M68HC05 datasheet(71/118 Pages) FREESCALE

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MC68HC05C9A Advance Information Data Sheet, Rev. 4.1

Freescale Semiconductor

Chapter 10

Serial Peripheral Interface (SPI)

10.1 Introduction

The serial peripheral interface (SPI) is an interface built into the device which allows several MC68HC05

MCUs, or MC68HC05 MCU plus peripheral devices, to be interconnected within a single printed circuit

board. In an SPI, separate wires are required for data and clock. In the SPI format, the clock is not

included in the data stream and must be furnished as a separate signal. An SPI system may be configured

in one containing one master MCU and several slave MCUs, or in a system in which an MCU is capable

of being a master or a slave.

10.2 Features

Features include:

•

Full-duplex, four-wire synchronous transfers

•

Master or slave operation

•

Bus frequency divided by 2 (maximum) master bit frequency

•

Bus frequency (maximum) slave bit frequency

•

Four programmable master bit rates

•

Programmable clock polarity and phase

•

End of transmission interrupt flag

•

Write collision flag protection

•

Master-master mode fault protection capability

10.3 SPI Signal Description

The four basic signals (MOSI, MISO, SCK, and SS) are described in the following paragraphs. Each

signal function is described for both the master and slave modes.

NOTE

In C9A mode, any SPI output line has to have its corresponding data

direction register bit set. If this bit is clear, the line is disconnected from the

SPI logic and becomes a general-purpose input line. When the SPI is

enabled, any SPI input line is forced to act as an input regardless of what

is in the corresponding data direction register bit.

M68HC05 Datasheet(PDF) 71 Page - Freescale Semiconductor, Inc