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XRT94L33IB Datasheet(PDF) 13 Page - Exar Corporation |
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XRT94L33IB Datasheet(HTML) 13 Page - Exar Corporation |
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13 / 110 page ![]() XRT94L33 Rev 2 22 ...0 00 ...0 00 3 33 ---C C C H H H A A AN N N N N N E E E L L L D D D S S S 3 33 ///E E E 3 33 ///S S S T T T S S S - -- 1 11 T T T O O O S S S T T T S S S - -- 3 33 ///S S S T T T M M M - -- 1 11 M M M A A AP P P P P P E E E R R R S S S O O O N N N E E E T T T A A AT T T M M M ///P P P P P P P P P – –– H H H A A AR R R W W W A A A R R R E E E M M M A A AN N N U U U A A AL L L 13 PIN # SIGNAL NAME I/O SIGNAL TYPE DESCRIPTION P1 REFTTL I TTL 19.44MHz or 77.76MHz Clock Synthesizer Reference Clock Input Pin: The exact function of this input pin depends upon whether the user enables the “Clock Synthesizer” block or not. If Clock Synthesizer is Enabled. If the “Clock Synthesizer” block is enabled, then it will be used to generate the 155.52MHz, 19.44MHz and/or 77.76MHz clock signal for the STS-3/STM-1 block. In this mode, the user should apply a clock signal of either of the following frequencies to this input pin. • 19.44 MHz • 38.88 MHz • 51.84 MHz • 77.76 MHz Afterwards, the user needs to write the appropriate data into the “Transmit Line Interface Control Register“ (Address Location = 0x0383) in order to (1) configure the Clock Synthesizer Block to accept any of the above-mentioned signals and generate a 155.52MHz, 19.44MHz or 77.76MHz clock signal, (2) to configure the Clock Synthesizer to function as the Clock Source for the STS-3/STM-1 block. If Clock Synthesizer is NOT Enabled: If the “Clock Synthesizer” block is NOT enabled, then it will NOT be used to generate the 19.44MHz and/or 77.76MHz clock signal, for the STS-3/STM-1 block. In this configuration seting, the user MUST apply a 19.44MHz clock signal to this input pin. AG3 LOSTTL I TTL Loss of Optical Carrier Input – Primary: The user is expected to connect the “Loss of Carrier” output (from the Optical Transceiver) to this input pin. If this input pin and the LOSPECL_P pin are pulled “high”, or if both of these input pins are pulled “low”, tthen the Receive STS- 3 TOH Processor block will declare a “Loss of Optical Carrier” condition. Note: This input pin is only active if the “Primary Port” is active. This input pin is inactive if the “Redundant Port” is active. AG25 LOSTTL_R I TTL Loss of Optical Carrier Input – Redundant: The user is expected to connect the “Loss of Carrier” output (from the Optical Transceiver) to this input pin. If this input pin and the LOSPECL_R are pulled “high”, or if both of these input pins are pulled “low”, then the Receive STS-3 TOH Processor block will declare a “Loss of Optical Carrier” condition. Note: This input pin is only active if the “Redundant Port” is active. This input pin is inactive if the “Primary Port” is active. |
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