XRT94L33IB datasheet(39/110 Pages) EXAR

39 / 110 page

XRT94L33

Rev 2

22 ...0

00 ...0

33 ---C

C H

H A

N N

N E

E L

L D

D S

S 3

33 ///E

E 3

33 ///S

S T

T S

S -

-- 1

11 T

T O

O S

S T

T S

S -

-- 3

33 ///S

S T

T M

M -

-- 1

11 M

M A

P P

P E

E R

R S

S O

O N

N E

E T

T A

T M

M ///P

P P

P –

–– H

H A

R W

W A

A R

R E

E M

M A

N U

U A

D17

AF18

TxOHFRAME_0

TxOHFRAME_1

TxOHFRAME_2

CMOS

Transmit Overhead Framing Pulse:

This input pin functions as the “Transmit Overhead Framing”

Pulse for the transmit system side interface when the

XRT94L33 is configured to operate in DS3/E3 mode, however,

it functions as the “Transmit STS-1 Overhead Enable” output

when the device is configured to operate in the STS-1 mode.

When configured to operate in DS3/E3 mode:

This output pin pulses high (for one TxOHClk_n” period)

coincident with the instant that the DS3/E3 Frame Generator

block will be accepting the very first overhead bit within an

outbound DS3 or E3 frame (via Transmit Overhead Data Input

Interface).

When configured to operate in STS-1 mode:

These output pins, along with the “TxOH_n”, “TxOHEnable_n”,

“TxOHIns_n” and “TxOHClk_n” function as the “Transmit

Overhead Input Port”.

The exact function of these output pins depends upon whether

the user inserting POH or TOH data via the “TxOH_n” input

pins.

If the user is only inserting POH data via these input pins:

In this mode, the “TxOH” port will pulse these output pins

“high” whenever it is ready to accept and process the J1 byte

(e.g., the very first POH byte) via this port.

If the user is inserting both POH and TOH data via these

input pins:

In this mode, the “TxOH” port will pulse these output pins

“high” coincident with the following.

Whenever the “TxOH” port is ready to accept and process the

A1 byte (e.g., the very first TOH byte) via this port.

Whenever the “TxOH” port is ready to accept and process the

J1 byte (e.g., the very first POH byte) via this port.

Notes:

The externally circuitry can determine whether the

“TxOH” port is expecting the A1 byte or the J1 byte,

checking

the

state

the

corresponding

“TxOHEnable” output pin.

If the “TxOHEnable_n”

output pin is “LOW” while the “TxOHFrame_n”

output pin is “HIGH”, then the “TxOH” port is ready

to process the A1 (TOH) bytes.

If the “TxOHEnable_n” output pin is “HIGH” while

the “TxOHFrame_n” output pin is “HIGH”, then the

“TxOH” port is ready to process the J1 (POH) bytes.

XRT94L33IB Datasheet(PDF) 39 Page - Exar Corporation

XRT94L33IB Datasheet(HTML) 39 Page - Exar Corporation

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