DRV5032 datasheet(3/39 Pages) TI1

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5 Pin Configuration and Functions

GND

VCC

OUT

Figure 5-1. FA, FB, FC, AJ, ZE Versions DBZ

Package 3-Pin SOT-23 Top View

GND

VCC

OUT2

Figure 5-2. DU Version DBZ Package 3-Pin SOT-23

Top View

GND

VCC

OUT

Therm al

Pad

Figure 5-3. FA, AJ Versions DMR Package 4-Pin

X2SON Top View

GND

VCC

OUT1

OUT2

Therm al

Pad

Figure 5-4. DU, DG, FD Versions DMR Package 4-

Pin X2SON Top View

VCC

GND

OUT

Figure 5-5. FA, FB, FC, AJ, ZE Versions LPG

Package 3-Pin TO-92 Top View

VCC

GND

OUT2

Figure 5-6. DU, FD Versions LPG Package 3-Pin

TO-92 Top View

Table 5-1. Pin Functions

I/O

DESCRIPTION

NAME

SOT-23

(FA, FB,

FC, AJ, ZE)

SOT-23

(DU)

TO-92

(FA, FB,

FC, AJ,

ZE)

TO-92

(DU, FD)

X2SON

(FA, AJ)

X2SON

(DU, DG,

FD)

GND

—

Ground reference

OUT

—

Omnipolar output that responds to north and south magnetic poles

OUT1

—

Unipolar output that responds to north magnetic poles near the top

of the package

OUT2

—

Unipolar output that responds to south magnetic poles near the

top of the package

—

No-connect. This pin is not connected to the silicon. Leave this

pin floating or tied to ground. Solder the pin to the board for

mechanical support.

VCC

—

1.65-V to 5.5-V power supply. TI recommends connecting this pin

to a ceramic capacitor to ground with a value of at least 0.1 µF.

Thermal

Pad

—

PAD

—

No-connect. Leave this pin floating or tied to ground. Solder the

pin to the board for mechanical support.

www.ti.com

DRV5032

SLVSDC7G – APRIL 2017 – REVISED JULY 2024

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