PPC440SPE datasheet(39/80 Pages) AMCC

39 / 80 page

PowerPC 440SPe Embedded Processor

Revision 1.23 - Sept 21, 2006

AMCC Proprietary

Preliminary Data Sheet

SYS2PLLG

AD26

Power

SYS2PLLV

AE26

SYSClk

C16

SYSErr

M25

SysPartSel

A11

SYSPLLG

B14

SYSPLLV

B13

SysReset

L09

System

TCK

AA17

JTAG

TDI

AB15

TDO

AD16

TESTEN

E12

THERMALDA

AA13

Miscellaneous

THERMALDB

AA14

TMR_CLK

K08

System

TMS

AC15

JTAG

[TRCCLK] [GPIO00] High Z

L01

Trace

Note: Trace can be enabled at reset by setting

SDR0_SDSTP1[DBG] (bit 27) to 1 in the serial

bootstrap ROM.

[TRCBS0] [GPIO01] High Z

H01

[TRCBS1] [GPIO02] High Z

F01

[TRCBS2] [GPIO03] High Z

L02

[TRCES0] [GPIO04] High Z

K03

[TRCES1] [GPIO05] High Z

G02

[TRCES2] [GPIO06] High Z

M05

[TRCES3] [GPIO07] High Z

F02

[TRCES4] [GPIO08] High Z

J03

[TRCTS0] [GPIO09] High Z

H04

[TRCTS1] [GPIO10] High Z

J05

[TRCTS2] [GPIO11] High Z

G05

[TRCTS3] [GPIO12] High Z

L05

[TRCTS4] [GPIO13] High Z

J04

[TRCTS5] [GPIO14] High Z

K06

[TRCTS6] [GPIO15] High Z

H06

TRST

AE17

JTAG

Table 3. Signals Listed Alphabetically (Sheet 23 of 25)

Signal Name

Ball

Interface Group

Page

PPC440SPE Datasheet(PDF) 39 Page - Applied Micro Circuits Corporation

PPC440SPE Datasheet(HTML) 39 Page - Applied Micro Circuits Corporation

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