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LMH6570MA/NOPB Datasheet(PDF) 19 Page - Texas Instruments |
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LMH6570MA/NOPB Datasheet(HTML) 19 Page - Texas Instruments |
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19 / 29 page ![]() LMH6570 www.ti.com SNCS104D – APRIL 2005 – REVISED DECEMBER 2014 8 Power Supply Recommendations 8.1 Power Dissipation The LMH6570 is optimized for maximum speed and performance in the small form factor of the standard SOIC package. To ensure maximum output drive and highest performance, thermal shutdown is not provided. Therefore, it is of utmost importance to make sure that the TJMAX is never exceeded due to the overall power dissipation. Follow these steps to determine the maximum power dissipation for the LMH6570: 1. Calculate the quiescent (no-load) power: PAMP = ICC* (VS), where • VS = V + - V− (1) 2. Calculate the RMS power dissipated in the output stage: PD (rms) = rms ((VS - VOUT) * IOUT) where • VOUT and IOUT are the voltage across • The current through the external load and VS is the total supply voltage (2) 3. Calculate the total RMS power: PT = PAMP + PD (3) The maximum power that t-he LMH6570 package can dissipate at a given temperature can be derived with the following equation: PMAX = (150° – TAMB)/ RθJA where • TAMB = Ambient temperature (°C) • RθJA = Thermal resistance, from junction to ambient, for a given package (°C/W) • For the SOIC package RθJA is 150 °C/W (4) 9 Layout 9.1 Layout Guidelines To reduce parasitic capacitances, ground and power planes should be removed near the input and output pins. For long signal paths controlled impedance lines should be used, along with impedance matching elements at both ends. Bypass capacitors should be placed as close to the device as possible. Bypass capacitors from each rail to ground are applied in pairs. The larger electrolytic bypass capacitors can be located farther from the device, whereas the smaller ceramic capacitors should be placed as close to the device as possible. In Figure 25, the capacitor between V+ and V− is optional, but is recommended for best second harmonic distortion. Another way to enhance performance is to use pairs of 0.01 μF and 0.1 μF ceramic capacitors for each supply bypass. Copyright © 2005–2014, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Links: LMH6570 |
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