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SPSB081 Datasheet(PDF) 97 Page - STMicroelectronics |
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SPSB081 Datasheet(HTML) 97 Page - STMicroelectronics |
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97 / 137 page  Bit Name Description The modified WD trigger time is valid only after the next trig event. Before it, old TSW value is kept 3 V2_TKR Voltage regulator V2 configurable as a linear independent LDO or a tracker of the V1 voltage regulator 0 = Linear independent LDO (default) 1 = Tracker of the V1 voltage regulator 2 V2_RAIL Voltage regulator V2 rail configuration 0 = V2 = 3.3 V (default) 1 = V2 = 5 V 1 STBY SEL Following are the valid settings: 11 = Go to V1 standby 10 = No transition to standby 01 = Go to VBAT_standby 00 = No transition to standby (default) 0 GO STBY 1. When the configuration of a timer is changed, the timer is automatically restarted using the new configuration. Table 75. Control register CR3 (0x03) 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Bit name Access 1 (R/W) 0 (R) 1 (R/W) 0 (R) 0 (R) SPSB081 Control registers DS14048 - Rev 3 page 97/137 |
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