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25CS160-H/ST Datasheet(PDF) 19 Page - Microchip Technology

Part # 25CS160-H/ST
Description  16-Kbit SPI Serial EEPROM with 128-Bit Serial Number
PDF  53 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

25CS160-H/ST Datasheet(HTML) 19 Page - Microchip Technology

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 2026 Microchip Technology Inc. and its subsidiaries
Preliminary
DS20007008B-page 19
25CS160
6.1.1
WRITE-PROTECT ENABLE BIT
The Write-Protect Enable (WPEN) bit in the STATUS
register (bit 7, byte 0) can be used in conjunction with
the WP pin to inhibit writing to the various registers
within the device.
The device is hardware write-protected when both the
WP pin is low and the WPEN bit has been set to a
logic ‘1’.
When the device is hardware write-protected, the
nonvolatile bits of the STATUS register (WPEN, BP1,
BP0) become read-only and the Write STATUS
Register (WRSR), Lock the Security Register (LOCK)
and Writing the Undervoltage Lockout Detector (WUVL)
instructions will not be accepted.
REGISTER 6-2:
STATUS REGISTER (BYTE 1)
U-0
R-0
U-0
U-0
U-0
R-0
U-0
R-0
—ECS
—WLS
RDY/BSY
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as ‘0’
bit 6
ECS: Error Correction State Latch
1 = The previous executed read sequence did require the Error Correction Code (ECC)
0 = The previous executed read sequence did not require the Error Correction Code (ECC)
bit 5
Unimplemented: Read as ‘0’
bit 4
Unimplemented: Read as ‘0’
bit 3
Unimplemented: Read as ‘0’
bit 2
WLS: Write Lockout State
1 = The previous nonvolatile write sequence was blocked by the UVLO
0 = The previous nonvolatile write sequence was not blocked by the UVLO
bit 1
Unimplemented: Read as ‘0’
bit 0
RDY/BSY: Ready/Busy Status Latch
1 = Device is busy with an internal write cycle
0 = Device is ready for a new sequence
TABLE 6-1:
WRITE-PROTECT FUNCTIONALITY MATRIX
Write Protection Mode
WP Pin
WPEN Bit
STATUS Register
UVLO
Register
Legacy
Low
0
Not Protected
Not Protected
Low
1
Protected
Protected
High
X
Not Protected
Not Protected
Note 1: When the WPEN bit is a logic ‘1’, it cannot be changed back to a logic ‘0’ as long as the WP pin is
asserted (low).



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