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DA7217 Datasheet(PDF) 57 Page - Renesas Technology Corp |
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DA7217 Datasheet(HTML) 57 Page - Renesas Technology Corp |
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57 / 157 page ![]() Ultra-Low Power Stereo Codec R32DS0005EE0370 Revision 3.7 Aug 9, 2024 CFR0011-120-00 Page 57 NOTE The gain settings for each gain-control register listed above are listed in Table 41. Table 41: Gain settings and values for all registers listed in Table 40 Gain Register Setting Value (dB) Gain Register Setting Value (dB) 00000 -42.0 10000 -18.0 00001 -40.5 10001 -16.5 00010 -39.0 10010 -15.0 00011 -37.5 10011 -13.5 00100 -36.0 10100 -12.0 00101 -34.5 10101 -10.5 00110 -33.0 10110 -9.0 00111 -31.5 10111 -7.5 01000 -30.0 11000 -6.0 01001 -28.5 11001 -4.5 01010 -27.0 11010 -3.0 01011 -25.5 11011 -1.5 01100 -24.0 11100 (default setting on all registers) 0.0 01101 -22.5 11101 1.5 01110 -21.0 11110 3.0 01111 -19.5 11111 4.5 9.3.4.8 Digital Gain 9.3.4.8.1 Input Channel Gain The four input filter channels can be set to apply gain in the range of -83.25 dB to +12 dB in 0.75 dB steps by programming in_1l_digital_gain, in_1r_digital_gain, in_2l_digital_gain, and in_2r_digital_gain. 9.3.4.8.2 Output Channel Gain The two output filter channels can be set to apply gain in the range of -83.25 dB to +108 dB in 0.75 dB steps by programming out_1l_digital_gain and out_1r_digital_gain. |
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