AS89010 datasheet(24/43 Pages) AMSOSRAM

24 / 43 page

ams.com

db12348e_V3.11_preliminary_2017-07-06

Page 22 of 41

AS89010

V3.11

CREGL

NAME

VALUE [b]

AFFECTED CONFIGURATION

01122

1.28 µA

1.28 pA

1XX

5.12 µA

5.12 pA

Integration Time (internal fCLK=1.024 MHz)

TINT (ms)

number of clock counts

0000

1024

0001

2048

0010

4096

0011

8192

0100

16384

0101

32768

011022

65536

0111

128

131072

1000

256

262144

1001

512

524288

1010

1024

1048576

1011 to 1111

1024

TINT = integration time = measurement time = conversion time

It has to be set by the proper assignment of the DIR bit in which direction the input current flows. The bit

R define device sensitivity, it internally sets the reference current of the A/D converters (see chapter 5.4

and Table 5 for more information).

The content of T controls the integration time duration and is a multiple of the internal clock periods. If

start and stop of measurement are externally controlled by SYND signal (SYND Mode), T is ignored.

The register CREGH generally defines the measurement modes of the device.

Table 11: CREGH register - Address 07h

CREGH

NAME

VALUE

[b]

AFFECTED CONFIGURATION

023

access to time counts for internal integration times (register OUTINT) is

disabled

access to time counts for internal integration times (register OUTINT) is

enabled

023

Standby disable

Standby enable

bit 5

023

reserved (must be set to ‘0’)

continuous measurement mode (CONT)

0123

command measurement mode (CMD)

synchronous measurement start (SYNS)

23 Default after power-on-reset and state change from measurement to configuration.

AS89010 Datasheet(PDF) 24 Page - ams-OSRAM AG

AS89010 Datasheet(HTML) 24 Page - ams-OSRAM AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

Datasheet Download

Link URL