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db12348e_V3.11_preliminary_2017-07-06

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AS89010

V3.11

In the CONT Mode the Standby is automatically deactivated by starting the measurement with setting the

OSR:SS bit to 1. If the OSR:SS bit is set to 0 the Standby becomes active again.

In the SYNS and SYND operation mode together with an activated Standby the start of the measurement

automatically deactivates the Standby bit in the CREGH register. In the CMD operation mode the Standby

cannot be activated.

5.4 A/D Conversion

In general the implemented A/D converter represents a delta-sigma converter, which performs and uses a

charge balancing between the input IIN and a reference current IREF as result OUT of ADC. The input current

integration takes place onto the integrator whose result is a pulse density modulated digital signal fCLK,

further filtered by up to 20 bit counter. At the end of integration the output OUT of this counter represents

a digital equivalent of the average input current IIN within the integration time interval TINT.

The transfer function of the A/D converter can be expressed as:

CLK

IREF

IN

N

I

I

OUT 

,

(1)

or:

CLK

IREF

IN

f

TINT

I

I

OUT





.

(2)

OUT : Digital output of conversion (corresponds to the content of output register)

IN

I

: Average input current within a conversion time interval

REF

I

: Reference current

TINT : Integration e.g. conversion time interval

CLK

N

: Number of clock cycles within the conversion time interval

CLK

f

: Clock frequency

In the CONT, CMD and SYNS Mode the integration time is internally generated13. Number of clock counts

within this interval is a constant number, so that output remains independent of clock frequency. In this

case an output can be represented by the equation (1).

In the SYND Mode integration time is externally generated, conversion result is represented by equation

(2). If the conversion time measurement is activated (CREGH:ENTM = ”1b”, see chapter 5.5), the number

of clock counts within the integration time can be also internally measured, so that conversion results may

be calculated as:

OUTINT

I

I

OUT

IREF

IN



.

(3)

OUTINT: Integration time duration expressed as the number of clock counts within this time. In this way

the input current can be measured independently of internal frequency and furthermore external integration

time variations in SYND Mode. The reference current and internal integration time are determined by the

13 The system clock is internally generated using an RC oscillator. It may have a little technological-inflicted tolerance, e.g. the exemplary

period of time may vary slightly. This must be considered when calculating the time to be programmed (e.g. BREAK or integration time).