R5F5671CDDLE datasheet(93/179 Pages) RENESAS

93 / 179 page

R01DS0373EJ0120 Rev.1.20

Page 93 of 179

Sep 30, 2024

RX671 Group

2. Electrical Characteristics

Figure 2.4

EXTAL External Clock Input Timing

Note 1. When using a main clock, ask the manufacturer of the oscillator to evaluate its oscillation. Refer to the results of evaluation

provided by the manufacturer for the oscillation stabilization time.

Note 2. The number of cycles selected by the value of the MOSCWTCR.MSTS[7:0] bits determines the main clock oscillation

stabilization waiting time in accord with the formula below.

tMAINOSCWT = [(MSTS[7:0] bits × 32) + 10] / fLOCO

Figure 2.5

Main Clock Oscillation Start Timing

Table 2.16

EXTAL Clock Timing

Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 V ≤ VREFH0 ≤ AVCC0,

VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V,

Ta = Topr

Item

Symbol

fEXMAIN ≤ 24MHz

fEXMAIN > 24MHz

Unit

Test

Conditions

Min.

Typ.

Max.

Min.

Typ.

Max.

EXTAL external clock input cycle time

tEXcyc

41.66

—

33.33

—

Figure 2.4

EXTAL external clock input frequency

fEXMAIN

——

MHz

EXTAL external clock input high pulse width

tEXH

15.83

—

13.33

—

EXTAL external clock input low pulse width

tEXL

15.83

—

13.33

—

EXTAL external clock rising time

tEXr

——

EXTAL external clock falling time

tEXf

——

Table 2.17

Main Clock Timing

Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 V ≤ VREFH0 ≤ AVCC0,

VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V,

Ta = Topr

Item

Symbol

Min.

Typ.

Max.

Unit

Test

Conditions

Main clock oscillation frequency

fMAIN

8—

MHz

Main clock oscillator stabilization time (crystal)

tMAINOSC

——

—*1

Figure 2.5

Main clock oscillation stabilization waiting time (crystal)

tMAINOSCWT

——

—*2

tEXH

tEXcyc

EXTAL external clock input

0.5 × VCC

tEXL

tEXr

tEXf

Main clock oscillator output

MOSCCR.MOSTP

tMAINOSC

Main clock

tMAINOSCWT

OSCOVFSR.MOOVF

R5F5671CDDLE Datasheet(PDF) 93 Page - Renesas Technology Corp

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