NRF52810-QCAA-R datasheet(415/483 Pages) NORDIC

415 / 483 page

Peripherals

If a more complex repeated start sequence is needed and the TWI firmware drive is serviced in a low

priority interrupt it may be necessary to use the SUSPEND task and SUSPENDED event to guarantee that

the correct tasks are generated at the correct time. This is illustrated in A double repeated start sequence

using the SUSPEND task to secure safe operation in low priority interrupts on page 415.

ADDR

Stretch

ADDR

Figure 111: A double repeated start sequence using the

SUSPEND task to secure safe operation in low priority interrupts

6.23.5 Low power

When putting the system in low power and the peripheral is not needed, lowest possible power

consumption is achieved by stopping, and then disabling the peripheral.

The STOP task may not be always needed (the peripheral might already be stopped), but if it is sent,

software shall wait until the STOPPED event was received as a response before disabling the peripheral

through the ENABLE register.

6.23.6 Master mode pin configuration

The SCL and SDA signals associated with the TWI master are mapped to physical pins according to the

configuration specified in the PSEL.SCL and PSEL.SDA registers respectively.

The PSEL.SCL and PSEL.SDA registers and their configurations are only used as long as the TWI master is

enabled, and retained only as long as the device is in ON mode. When the peripheral is disabled, the pins

will behave as regular GPIOs, and use the configuration in their respective OUT bit field and PIN_CNF[n]

To secure correct signal levels on the pins used by the TWI master when the system is in OFF mode, and

when the TWI master is disabled, these pins must be configured in the GPIO peripheral as described in

GPIO configuration before enabling peripheral on page 415.

Only one peripheral can be assigned to drive a particular GPIO pin at a time. Failing to do so may result in

unpredictable behavior.

TWI master signal

TWI master pin

Direction

Output value

Drive strength

SCL

As specified in PSEL.SCL

Input

Not applicable

S0D1

SDA

As specified in PSEL.SDA

Input

Not applicable

S0D1

Table 86: GPIO configuration before enabling peripheral

4430_161 v1.0

415

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