NRF52811-QCAA-R datasheet(193/444 Pages) NORDIC

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Peripherals

Switch pattern configuration

The values of the GPIOs while switching during the CTE are configured by writing successively to the

SWITCHPATTERN register. The first write to SWITCHPATTERN is the GPIO pattern applied from the call

of TASKS_TXEN or TASKS_RXEN until the first antenna switch is triggered. The second write sets the

pattern for the reference period and is applied at the start of the guard period. The following writes

set the pattern for the remaining switch slots and are applied at the start of each switch slot. If writing

beyond the total number of antenna slots, the pattern will wrap to SWITCHPATTERN[2] and start over

again. During operation, when the end of the SWITCHPATTERN buffer is reached, the RADIO cycles

back to SWITCHPATTERN[2]. At the end of the AoA/AoD procedure, SWITCHPATTERN[0] is applied to

DFECTRL1.TSWITCHSPACING after the previous antenna switch. The SWITCHPATTERN buffer can be

erased/cleared using CLEARPATTERN.

A minimum number of three patterns must be written to the SWITCHPATTERN register.

If CTEINLINECONF.CTEINLINECTRLEN is not set, then the antenna switch spacing is determined by

DFECTRL1.TSWITCHSPACING (otherwise described by Switching and sampling spacing based on CTEType

on page 191). DFECTRL2.TSWITCHOFFSET determines the position of the first switch compared to the

configurable start of CTE (see DFECTRL1.DFEINEXTENSION).

6.14.12.7 IQ sampling

The RADIO uses DMA to write IQ samples recorded during the CTE to RAM. Alternatively, the magnitude

and phase of the samples can be recorded using the DFECTRL1.SAMPLETYPE field. The samples are

written to the location in RAM specified by DFEPACKET.PTR. The maximum number of samples to

transfer are specified by DFEPACKET.MAXCNT and the number of samples transferred are given in

DFEPACKET.AMOUNT. The IQ samples are recorded with respect to the RX carrier frequency. The format of

the samples is provided in the following table.

SAMPLETYPE

Field

Bits

Description

31:16

0: I_Q (default)

15:0

12 bits signed, sign extended to 16 bits

reserved

31:29

Always zero

magnitude

28:16

13 bits unsigned. Equals 1.646756*sqrt(I^2+Q^2)

1: MagPhase

phase

15:0

9 bits signed, sign extended to 16 bits. Equals 64*atan2(Q, I) in the range [-201,201]

Table 64: Format of samples

Oversampling is configured separately for the reference period and for the time after the reference period.

During the reference period, the sample spacing is determined by DFECTRL1.TSAMPLESPACINGREF.

DFECTRL2.TSAMPLEOFFSET determines the position of the first sample relative to the end of the last bit of

the CRC.

For the time after the reference period, if CTEINLINECONF.CTEINLINECTRLEN is disabled, the sample

spacing is set in DFECTRL1.TSAMPLESPACING. However, when CTEINLINECONF.CTEINLINECTRLEN is

enabled, the sample spacing are determined by two different registers, depending on whether the device

is in AoA or AoD RX-mode, as follows.

For AoD RX mode, the sample spacing after the reference period is determined by the CTEType in the

packet, as listed in the table below.

CTEType

Sample spacing

AoD 1 µs slots

CTEINLINECONF.CTEINLINERXMODE1US

AoD 2 µs slots

CTEINLINECONF.CTEINLINERXMODE2US

Other

DFECTRL1.TSAMPLESPACING

Table 65: Sample spacing when CTEINLINECONF.CTEINLINECTRLEN is set and the device is in AoD RX mode

4454_140 v1.0

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NRF52811-QCAA-R Datasheet(PDF) 193 Page - Nordic Semiconductor

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