R5F72115D160FPV datasheet(653/1228 Pages) RENESAS

653 / 1228 page

Section 12 Port Output Enable 2 (POE2)

Rev. 2.00 May. 08, 2008 Page 629 of 1200

REJ09B0344-0200

Bit

Bit Name

Initial

Value

R/W

Description

MTU2SP2CZE 1

R/W*

MTU2S Port 2 Output Comparison/High-Impedance

Enable

Specifies whether to compare output levels for the

MTU2S high-current PB12/TIOC4AS and

PB10/TIOC4CS pins and to place them in high-

impedance state when the OSF2 bit is set to 1 while

the OCE2 bit is 1 or when any one of the POE4F,

POE7F, and MTU2SHIZ bits is set to 1.

0: Does not compare output levels or place the pins in

high-impedance state.

1: Compares output levels and places the pins in

high-impedance state.

MTU2SP3CZE 1

R/W*

MTU2S Port 3 Output Comparison/High-Impedance

Enable

Specifies whether to compare output levels for the

MTU2S high-current PB13/TIOC4BS and

PB11/TIOC4DS pins and to place them in high-

impedance state when the OSF2 bit is set to 1 while

the OCE2 bit is 1 or when any one of the POE4F,

POE7F, and MTU2SHIZ bits is set to 1.

0: Does not compare output levels or place the pins in

high-impedance state.

1: Compares output levels and places the pins in

high-impedance state.

7 to 0

—

All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

Note:

Can be modified only once after a power-on reset.

R5F72115D160FPV Datasheet(PDF) 653 Page - Renesas Technology Corp

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