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R5F72115D160FPV Datasheet(PDF) 712 Page - Renesas Technology Corp

Part # R5F72115D160FPV
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family
PDF  1228 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F72115D160FPV Datasheet(HTML) 712 Page - Renesas Technology Corp

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Section 15 Serial Communication Interface with FIFO (SCIF)
Rev. 2.00 May. 08, 2008 Page 688 of 1200
REJ09B0344-0200
Table 15.3
SCSMR Settings
SCSMR Settings
n
Clock Source
CKS1
CKS0
0
P
φ
0
0
1
P
φ/4
0
1
2
P
φ/16
1
0
3
P
φ/64
1
1
The bit rate error in asynchronous is given by the following formula:
(1) In normal mode (when the ABCS bit in SCSEMR is 0)
Error (%) =
− 1 × 100
(N + 1)
× B × 64 × 22n-1
P
φ × 106
(2) In serial extended mode (when the ABCS bit in SCSEMR is 1)
Error (%) =
− 1 × 100
(N + 1)
× B × 32 × 22n-1
P
φ × 106
Table 15.4 lists examples of SCBRR settings in asynchronous mode, and table 15.5 lists examples
of SCBRR settings in clocked synchronous mode.



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